{"id":"https://openalex.org/W2102681500","doi":"https://doi.org/10.1145/1278480.1278603","title":"Modeling the function cache for worst-case execution time analysis","display_name":"Modeling the function cache for worst-case execution time analysis","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2102681500","doi":"https://doi.org/10.1145/1278480.1278603","mag":"2102681500"},"language":"en","primary_location":{"id":"doi:10.1145/1278480.1278603","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278480.1278603","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"Proceedings - ACM IEEE Design Automation Conference","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 44th annual conference on Design automation - DAC '07","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090186060","display_name":"Raimund Kirner","orcid":"https://orcid.org/0000-0003-3921-6813"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Raimund Kirner","raw_affiliation_strings":["Technische Universitaet Wien, Austria","Technische Universitaet, Wien, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technische Universitaet Wien, Austria","institution_ids":[]},{"raw_affiliation_string":"Technische Universitaet, Wien, Austria","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083205602","display_name":"Martin Schoeberl","orcid":"https://orcid.org/0000-0003-2366-382X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Martin Schoeberl","raw_affiliation_strings":["Technische Universitaet Wien, Austria","Technische Universitaet, Wien, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technische Universitaet Wien, Austria","institution_ids":[]},{"raw_affiliation_string":"Technische Universitaet, Wien, Austria","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"471","last_page":"471"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7849174737930298},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6985845565795898},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.5175851583480835},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4671795964241028},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.4212779104709625},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.41871270537376404},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.3639179468154907},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.29936856031417847},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.19807448983192444}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7849174737930298},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6985845565795898},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.5175851583480835},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4671795964241028},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.4212779104709625},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.41871270537376404},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.3639179468154907},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.29936856031417847},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.19807448983192444},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1278480.1278603","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278480.1278603","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"Proceedings - ACM IEEE Design Automation Conference","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 44th annual conference on Design automation - DAC '07","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.1031.695","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.1031.695","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://www.researchgate.net/profile/Martin_Schoeberl/publication/4257369_Modeling_the_Function_Cache_for_Worst-Case_Execution_Time_Analysis/links/0912f51143cab20cfb000000.pdf","raw_type":"text"},{"id":"pmh:oai:uhra.herts.ac.uk:2299/13797","is_oa":false,"landing_page_url":"http://hdl.handle.net/2299/13797","pdf_url":null,"source":{"id":"https://openalex.org/S4306400241","display_name":"University of Hertfordshire Research Archive (University of Hertfordshire)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I141584323","host_organization_name":"University of Hertfordshire","host_organization_lineage":["https://openalex.org/I141584323"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1491178396","https://openalex.org/W1499210710","https://openalex.org/W1521915012","https://openalex.org/W1527581944","https://openalex.org/W1595437973","https://openalex.org/W1606583766","https://openalex.org/W1974909417","https://openalex.org/W2006053872","https://openalex.org/W2025554746","https://openalex.org/W2089757303","https://openalex.org/W2117047970","https://openalex.org/W2162222856","https://openalex.org/W3147851186"],"related_works":["https://openalex.org/W2350993697","https://openalex.org/W2031173804","https://openalex.org/W2803610590","https://openalex.org/W2363769136","https://openalex.org/W3085471909","https://openalex.org/W2009566782","https://openalex.org/W2114386333","https://openalex.org/W1994118623","https://openalex.org/W2041820064","https://openalex.org/W4226294143"],"abstract_inverted_index":{"Static":[0],"worst-case":[1,52],"execution":[2],"time":[3],"(WCET)":[4],"analysis":[5,20,64,77],"is":[6,79],"done":[7],"by":[8],"modeling":[9],"the":[10,44,51,67,72,80,89],"hardware":[11],"behavior.":[12],"In":[13],"this":[14,58,76],"paper":[15,59],"we":[16,60],"describe":[17],"a":[18,28,62],"WCET":[19],"technique":[21,65,78],"to":[22,46,86],"analyze":[23],"systems":[24],"with":[25,43],"function":[26,68,90],"caches,":[27],"special":[29],"kind":[30],"of":[31,71,75],"instruction":[32,55],"cache":[33,40,63],"that":[34],"caches":[35],"whole":[36],"functions":[37],"only.":[38],"This":[39],"was":[41],"designed":[42],"aim":[45],"be":[47],"more":[48],"predictable":[49],"for":[50,66],"than":[53],"existing":[54],"caches.":[56],"Within":[57],"developed":[61],"cache.":[69,91],"One":[70],"new":[73],"concepts":[74],"local":[81],"persistence":[82],"analysis,":[83],"which":[84],"allows":[85],"precisely":[87],"model":[88]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
