{"id":"https://openalex.org/W2163880998","doi":"https://doi.org/10.1145/1278480.1278591","title":"Modeling simultaneous switching noise-induced jitter for system-on-chip phase-locked loops","display_name":"Modeling simultaneous switching noise-induced jitter for system-on-chip phase-locked loops","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2163880998","doi":"https://doi.org/10.1145/1278480.1278591","mag":"2163880998"},"language":"en","primary_location":{"id":"doi:10.1145/1278480.1278591","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278480.1278591","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"Proceedings - ACM IEEE Design Automation Conference","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 44th annual conference on Design automation - DAC '07","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083906620","display_name":"H.H.Y. Chan","orcid":null},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Henry H. Y. Chan","raw_affiliation_strings":["McGill University, Montreal, QC, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"McGill University, Montreal, QC, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062514163","display_name":"\u017deljko \u017dili\u0107","orcid":"https://orcid.org/0000-0002-6887-3911"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Zeljko Zilic","raw_affiliation_strings":["McGill University, Montreal, QC, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"McGill University, Montreal, QC, Canada","institution_ids":["https://openalex.org/I5023651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5023651"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"430","last_page":"430"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8929175734519958},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.7356907725334167},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5954011082649231},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5426100492477417},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5031670928001404},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4828534722328186},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4758574366569519},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4425158202648163},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17633727192878723},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14664465188980103},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.13753631711006165}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8929175734519958},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.7356907725334167},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5954011082649231},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5426100492477417},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5031670928001404},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4828534722328186},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4758574366569519},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4425158202648163},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17633727192878723},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14664465188980103},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.13753631711006165},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1278480.1278591","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278480.1278591","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"Proceedings - ACM IEEE Design Automation Conference","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 44th annual conference on Design automation - DAC '07","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1021741281","https://openalex.org/W1580873078","https://openalex.org/W2109650234","https://openalex.org/W2130758723","https://openalex.org/W2154034248","https://openalex.org/W2156550596","https://openalex.org/W3147662010"],"related_works":["https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2474043983","https://openalex.org/W2008250178","https://openalex.org/W2078513307","https://openalex.org/W2566880546","https://openalex.org/W2544336511","https://openalex.org/W2144737022","https://openalex.org/W1978186604","https://openalex.org/W2065289416"],"abstract_inverted_index":{"Phase-Locked":[0],"Loops":[1],"(PLLs)":[2],"are":[3,20,87],"versatile":[4],"modules":[5,78],"for":[6],"synchronization":[7],"and":[8,79,85],"applications":[9],"such":[10,30],"as":[11,31],"high-speed":[12],"serial":[13],"interfaces":[14],"in":[15,42],"System-on-Chips":[16],"(SoCs).":[17],"Their":[18],"precisions":[19],"critical":[21],"to":[22,53],"proper":[23],"functioning":[24],"of":[25],"the":[26,39,59,63],"SoCs.":[27],"Intermodule":[28],"interference":[29],"simultaneous":[32],"switching":[33],"noise":[34,80],"(SSN)":[35],"is":[36],"time-varying,":[37],"where":[38],"stationary":[40],"assumption":[41],"conventional":[43],"jitter":[44,56],"analysis":[45,71],"does":[46],"not":[47],"apply.":[48],"We":[49],"propose":[50],"a":[51],"methodology":[52],"compute":[54],"PLL":[55,64],"by":[57],"investigating":[58],"harmonic":[60],"relations":[61],"between":[62],"system":[65],"with":[66],"SSN.":[67],"This":[68],"provides":[69],"statistical":[70],"over":[72],"many":[73],"VCO":[74],"design":[75],"parameters,":[76],"SoC":[77],"barrier":[81],"configurations.":[82],"Its":[83],"accuracy":[84],"efficiency":[86],"compared":[88],"against":[89],"circuit":[90],"simulations.":[91]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}