{"id":"https://openalex.org/W2167480374","doi":"https://doi.org/10.1145/1278480.1278581","title":"Silicon speedpath measurement and feedback into EDA flows","display_name":"Silicon speedpath measurement and feedback into EDA flows","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2167480374","doi":"https://doi.org/10.1145/1278480.1278581","mag":"2167480374"},"language":"en","primary_location":{"id":"doi:10.1145/1278480.1278581","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278480.1278581","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"Proceedings - ACM IEEE Design Automation Conference","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 44th annual conference on Design automation - DAC '07","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037460485","display_name":"Kip Killpack","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kip Killpack","raw_affiliation_strings":["Intel Strategic CAD Labs, Hillsboro, OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Strategic CAD Labs, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110899319","display_name":"Chandramouli Kashyap","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chandramouli Kashyap","raw_affiliation_strings":["Intel Strategic CAD Labs, Hillsboro, OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Strategic CAD Labs, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087685981","display_name":"Eli Chiprout","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eli Chiprout","raw_affiliation_strings":["Intel Strategic CAD Labs, Hillsboro, OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Strategic CAD Labs, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":8.262,"has_fulltext":false,"cited_by_count":53,"citation_normalized_percentile":{"value":0.9783697,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"390","last_page":"390"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7381139993667603},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7250106334686279},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5512675046920776},{"id":"https://openalex.org/keywords/isolation","display_name":"Isolation (microbiology)","score":0.4762009382247925},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.45813918113708496},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.457692950963974},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4573211073875427},{"id":"https://openalex.org/keywords/data-modeling","display_name":"Data modeling","score":0.41255998611450195},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.3226950168609619},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24796003103256226},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16302192211151123},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.16137611865997314},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11086368560791016},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.08286765217781067}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7381139993667603},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7250106334686279},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5512675046920776},{"id":"https://openalex.org/C2775941552","wikidata":"https://www.wikidata.org/wiki/Q25212305","display_name":"Isolation (microbiology)","level":2,"score":0.4762009382247925},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.45813918113708496},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.457692950963974},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4573211073875427},{"id":"https://openalex.org/C67186912","wikidata":"https://www.wikidata.org/wiki/Q367664","display_name":"Data modeling","level":2,"score":0.41255998611450195},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.3226950168609619},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24796003103256226},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16302192211151123},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.16137611865997314},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11086368560791016},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.08286765217781067},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C89423630","wikidata":"https://www.wikidata.org/wiki/Q7193","display_name":"Microbiology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1278480.1278581","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278480.1278581","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"Proceedings - ACM IEEE Design Automation Conference","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 44th annual conference on Design automation - DAC '07","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.550000011920929,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2098440959","https://openalex.org/W2101029991","https://openalex.org/W2111033234","https://openalex.org/W2126827022","https://openalex.org/W2131751530","https://openalex.org/W2145146339","https://openalex.org/W2151400049","https://openalex.org/W2162523242"],"related_works":["https://openalex.org/W4253195573","https://openalex.org/W2020934033","https://openalex.org/W63276784","https://openalex.org/W3011978806","https://openalex.org/W2156446048","https://openalex.org/W2059530328","https://openalex.org/W2163890360","https://openalex.org/W2148225649","https://openalex.org/W2070693700","https://openalex.org/W2003481063"],"abstract_inverted_index":{"Timing,":[0],"test,":[1],"reliability,":[2],"and":[3,7,12,37,48,57,62,77,86,95,117],"noise":[4],"are":[5,18],"modeled":[6],"abstracted":[8,25],"in":[9,28,91],"our":[10],"design":[11,35,121],"verification":[13],"flows.":[14,63],"Specific":[15],"EDA":[16,60],"algorithms":[17],"then":[19],"designed":[20],"to":[21,55,72,84,93,113,126],"work":[22],"with":[23],"these":[24,79],"models,":[26],"often":[27],"isolation":[29],"of":[30,119],"other":[31],"effects.":[32,99],"However,":[33],"tighter":[34],"margins":[36],"higher":[38],"reliability":[39],"issues":[40],"have":[41],"increased":[42],"the":[43,59,97,115,120,128],"need":[44],"for":[45],"accurate":[46,104],"models":[47],"algorithms.":[49],"We":[50],"propose":[51],"utilizing":[52],"silicon":[53,70,74],"data":[54],"tune":[56,114],"improve":[58],"tools":[61],"In":[64],"this":[65],"paper":[66],"we":[67],"describe":[68],"a":[69,81],"methodology":[71],"isolate":[73,88],"speedpath":[75,106],"environments":[76],"feed":[78],"into":[80],"simulation":[82],"framework":[83],"temporally":[85],"spatially":[87],"specific":[89],"speedpaths":[90],"order":[92],"model":[94],"understand":[96],"real":[98],"This":[100],"is":[101],"done":[102],"using":[103],"electrical":[105,131],"modeling":[107],"techniques":[108],"which":[109],"may":[110],"be":[111,134],"used":[112],"accuracy":[116],"correlation":[118],"models.":[122],"The":[123],"effort":[124],"required":[125],"distinguish":[127],"many":[129],"different":[130],"effects":[132],"will":[133],"outlined.":[135]},"counts_by_year":[{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":12}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
