{"id":"https://openalex.org/W1965979241","doi":"https://doi.org/10.1145/1278349.1278356","title":"MPSoC memory optimization using program transformation","display_name":"MPSoC memory optimization using program transformation","publication_year":2007,"publication_date":"2007-09-01","ids":{"openalex":"https://openalex.org/W1965979241","doi":"https://doi.org/10.1145/1278349.1278356","mag":"1965979241"},"language":"en","primary_location":{"id":"doi:10.1145/1278349.1278356","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278349.1278356","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026685316","display_name":"Youcef Bouchebaba","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Youcef Bouchebaba","raw_affiliation_strings":["\u00c9cole Polytechnique de Montr\u00e9al"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"\u00c9cole Polytechnique de Montr\u00e9al","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075649430","display_name":"B. Girodias","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Bruno Girodias","raw_affiliation_strings":["\u00c9cole Polytechnique de Montr\u00e9al"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"\u00c9cole Polytechnique de Montr\u00e9al","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022527556","display_name":"Gabriela Nicolescu","orcid":"https://orcid.org/0000-0002-5205-9931"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Gabriela Nicolescu","raw_affiliation_strings":["\u00c9cole Polytechnique de Montr\u00e9al"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"\u00c9cole Polytechnique de Montr\u00e9al","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048679498","display_name":"E.M. Aboulhamid","orcid":null},"institutions":[{"id":"https://openalex.org/I70931966","display_name":"Universit\u00e9 de Montr\u00e9al","ror":"https://ror.org/0161xgx34","country_code":"CA","type":"education","lineage":["https://openalex.org/I70931966"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"El Mostapha Aboulhamid","raw_affiliation_strings":["Universit\u00e9 de Montr\u00e9al","UNIVERSITE DE MONTREAL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universit\u00e9 de Montr\u00e9al","institution_ids":["https://openalex.org/I70931966"]},{"raw_affiliation_string":"UNIVERSITE DE MONTREAL","institution_ids":["https://openalex.org/I70931966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019380489","display_name":"Bruno Lavigueur","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124177","display_name":"STMicroelectronics (Czechia)","ror":"https://ror.org/03c7ss521","country_code":"CZ","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210124177"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Bruno Lavigueur","raw_affiliation_strings":["STMicroelectronics"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics","institution_ids":["https://openalex.org/I4210124177"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073518200","display_name":"Pierre Paulin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124177","display_name":"STMicroelectronics (Czechia)","ror":"https://ror.org/03c7ss521","country_code":"CZ","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210124177"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Pierre Paulin","raw_affiliation_strings":["STMicroelectronics"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics","institution_ids":["https://openalex.org/I4210124177"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.2291,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.87252558,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"12","issue":"4","first_page":"43","last_page":"43"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9149714708328247},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7651726007461548},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.721777081489563},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5429061055183411},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5014948844909668},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.44912034273147583},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.431584894657135},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4242274761199951},{"id":"https://openalex.org/keywords/loop-tiling","display_name":"Loop tiling","score":0.41088324785232544},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3874076008796692},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.2040785551071167},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1353740096092224}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9149714708328247},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7651726007461548},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.721777081489563},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5429061055183411},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5014948844909668},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.44912034273147583},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.431584894657135},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4242274761199951},{"id":"https://openalex.org/C11799548","wikidata":"https://www.wikidata.org/wiki/Q6675847","display_name":"Loop tiling","level":3,"score":0.41088324785232544},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3874076008796692},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.2040785551071167},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1353740096092224},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1278349.1278356","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1278349.1278356","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},{"id":"pmh:oai:publications.polymtl.ca:22210","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/22210/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article de revue"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":52,"referenced_works":["https://openalex.org/W106268139","https://openalex.org/W1484657265","https://openalex.org/W1503700136","https://openalex.org/W1504751168","https://openalex.org/W1514857085","https://openalex.org/W1515448847","https://openalex.org/W1585509108","https://openalex.org/W1737297434","https://openalex.org/W1966708457","https://openalex.org/W1973122629","https://openalex.org/W1985161391","https://openalex.org/W2000977235","https://openalex.org/W2002252837","https://openalex.org/W2003368909","https://openalex.org/W2005719980","https://openalex.org/W2009725282","https://openalex.org/W2010196134","https://openalex.org/W2017264709","https://openalex.org/W2029479717","https://openalex.org/W2046164356","https://openalex.org/W2070922326","https://openalex.org/W2073866852","https://openalex.org/W2077805988","https://openalex.org/W2091300965","https://openalex.org/W2095641233","https://openalex.org/W2099958604","https://openalex.org/W2100097836","https://openalex.org/W2107522776","https://openalex.org/W2116182251","https://openalex.org/W2119609467","https://openalex.org/W2127669603","https://openalex.org/W2134290033","https://openalex.org/W2135045949","https://openalex.org/W2135389994","https://openalex.org/W2142891960","https://openalex.org/W2143627170","https://openalex.org/W2144324947","https://openalex.org/W2148607712","https://openalex.org/W2152506070","https://openalex.org/W2157758640","https://openalex.org/W2164890169","https://openalex.org/W2170653240","https://openalex.org/W2176106924","https://openalex.org/W2296218291","https://openalex.org/W2561675875","https://openalex.org/W2592270044","https://openalex.org/W2911227854","https://openalex.org/W3004256893","https://openalex.org/W3203568064","https://openalex.org/W4213172915","https://openalex.org/W4232919122","https://openalex.org/W4239331546"],"related_works":["https://openalex.org/W4281711577","https://openalex.org/W2178653557","https://openalex.org/W2106200299","https://openalex.org/W2994908368","https://openalex.org/W2502691491","https://openalex.org/W1976012348","https://openalex.org/W2002682434","https://openalex.org/W2137671689","https://openalex.org/W4387782849","https://openalex.org/W2113449380"],"abstract_inverted_index":{"Multiprocessor":[0],"system-on-a-chip":[1],"(MPSoC)":[2],"architectures":[3,40],"have":[4],"received":[5],"a":[6,48,121,143],"lot":[7],"of":[8,30,34,84,149],"attention":[9],"in":[10,17,42,59,97,146,155],"the":[11,28,35,43,72,82,94,98,109,129,147],"past":[12],"years,":[13],"but":[14],"few":[15],"advances":[16],"compilation":[18,36],"techniques":[19,37,56,80,141],"target":[20],"these":[21,134,140],"architectures.":[22],"This":[23,52,100],"is":[24],"particularly":[25],"true":[26],"for":[27,38],"exploitation":[29],"data":[31,150],"locality.":[32],"Most":[33],"parallel":[39],"discussed":[41],"literature":[44],"are":[45,118,125],"based":[46],"on":[47],"single":[49],"loop":[50,61,67],"nest.":[51],"article":[53,101],"presents":[54],"new":[55],"that":[57,139],"consist":[58],"applying":[60],"fusion":[62],"and":[63,69,91,154],"tiling":[64],"to":[65,70,103,127],"several":[66],"nests":[68],"parallelize":[71],"resulting":[73],"code":[74],"across":[75],"different":[76],"processors.":[77],"These":[78],"two":[79],"reduce":[81,93],"number":[83,148],"memory":[85,110],"accesses.":[86],"However,":[87],"they":[88],"increase":[89],"dependencies":[90],"thereby":[92],"exploitable":[95],"parallelism":[96],"code.":[99],"tries":[102],"address":[104],"this":[105],"contradiction.":[106],"To":[107],"optimize":[108,128],"space":[111],"used":[112,119],"by":[113],"temporary":[114],"arrays,":[115],"smaller":[116],"buffers":[117],"as":[120],"replacement.":[122],"Different":[123],"strategies":[124],"studied":[126],"processing":[130,156],"time":[131,157],"spent":[132],"accessing":[133],"buffers.":[135],"The":[136],"experiments":[137],"show":[138],"yield":[142],"significant":[144],"reduction":[145],"cache":[151],"misses":[152],"(30%)":[153],"(50%).":[158]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}