{"id":"https://openalex.org/W2293821175","doi":"https://doi.org/10.1145/1274971.1274993","title":"Sequencer virtualization","display_name":"Sequencer virtualization","publication_year":2007,"publication_date":"2007-06-17","ids":{"openalex":"https://openalex.org/W2293821175","doi":"https://doi.org/10.1145/1274971.1274993","mag":"2293821175"},"language":"en","primary_location":{"id":"doi:10.1145/1274971.1274993","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1274971.1274993","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 21st annual international conference on Supercomputing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008708613","display_name":"Perry H. Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Perry H. Wang","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005994838","display_name":"Jamison D. Collins","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Jamison D. Collins","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019370884","display_name":"Gautham N. Chinya","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Gautham N. Chinya","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022715590","display_name":"Bernard Lint","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Bernard Lint","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084050312","display_name":"Asit Mallick","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Asit Mallick","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103224846","display_name":"K\u00f4ichi Yamada","orcid":"https://orcid.org/0000-0001-7207-0313"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Koichi Yamada","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100371015","display_name":"Hong Wang","orcid":"https://orcid.org/0009-0008-2874-2168"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Hong Wang","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3184,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.67007746,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"148","last_page":"157"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8587961196899414},{"id":"https://openalex.org/keywords/virtualization","display_name":"Virtualization","score":0.5791975259780884},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5772203207015991},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.5313948392868042},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.5188585519790649},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4780305325984955},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4226375222206116},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.21662768721580505},{"id":"https://openalex.org/keywords/cloud-computing","display_name":"Cloud computing","score":0.1611822247505188}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8587961196899414},{"id":"https://openalex.org/C513985346","wikidata":"https://www.wikidata.org/wiki/Q270471","display_name":"Virtualization","level":3,"score":0.5791975259780884},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5772203207015991},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.5313948392868042},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.5188585519790649},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4780305325984955},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4226375222206116},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.21662768721580505},{"id":"https://openalex.org/C79974875","wikidata":"https://www.wikidata.org/wiki/Q483639","display_name":"Cloud computing","level":2,"score":0.1611822247505188}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1274971.1274993","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1274971.1274993","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 21st annual international conference on Supercomputing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4000000059604645,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1538592187","https://openalex.org/W1664707389","https://openalex.org/W2016559894","https://openalex.org/W2097346625","https://openalex.org/W2106561538","https://openalex.org/W2108157916","https://openalex.org/W2112049462","https://openalex.org/W2121758805","https://openalex.org/W2132100607","https://openalex.org/W2140332639","https://openalex.org/W2140379632","https://openalex.org/W2141360667","https://openalex.org/W2144643978","https://openalex.org/W2151182669","https://openalex.org/W2170585292","https://openalex.org/W3182601015","https://openalex.org/W4241388180","https://openalex.org/W4242466841"],"related_works":["https://openalex.org/W1973516247","https://openalex.org/W2271326670","https://openalex.org/W2552925293","https://openalex.org/W1478590381","https://openalex.org/W3074768883","https://openalex.org/W1996880143","https://openalex.org/W2384916795","https://openalex.org/W1980898636","https://openalex.org/W2045325972","https://openalex.org/W2141090099"],"abstract_inverted_index":{"The":[0],"Multiple":[1],"Instruction":[2],"Stream":[3],"Processor":[4],"(MISP)":[5],"architecture":[6],"introduces":[7],"the":[8,49,61,88,98,103,128],"sequencer":[9,50,85,139,159],"as":[10],"a":[11,19,67,93,114,119,123,149,175],"new":[12],"class":[13],"of":[14,33,63,84,151,164],"architectural":[15,43,51,69,73,99],"resource,":[16],"and":[17,47],"provides":[18],"minimalist":[20],"user-level":[21],"MIMD":[22],"instruction":[23,35],"set":[24,150],"extension":[25],"for":[26,106,148],"application":[27],"programs":[28],"to":[29,56,71],"directly":[30],"control":[31],"execution":[32],"concurrent":[34],"streams":[36],"on":[37,122],"these":[38],"sequencers.":[39,78],"As":[40],"with":[41],"classic":[42],"resources,":[44],"namely,":[45],"registers":[46],"memory,":[48],"resource":[52],"can":[53,156],"be":[54],"subject":[55],"virtualization.":[57],"This":[58],"paper":[59],"details":[60],"idea":[62],"Sequencer":[64],"Virtualization":[65],"(SV),":[66],"foundational":[68],"support":[70,173],"decouple":[72],"virtual":[74],"sequencers":[75],"from":[76],"physical":[77],"SV":[79,116,130,135,155,172],"enables":[80],"more":[81],"efficient":[82],"utilization":[83,140],"resources":[86],"at":[87,97],"microarchitectural":[89],"level":[90],"while":[91,141],"maintaining":[92],"consistent":[94],"programming":[95],"interface":[96],"level.":[100],"To":[101],"evaluate":[102],"key":[104],"tradeoffs":[105],"SV,":[107],"we":[108,132],"conduct":[109],"extensive":[110],"experiments":[111],"by":[112],"implementing":[113],"prototype":[115,129],"system":[117],"using":[118],"custom":[120],"firmware":[121],"large-scale":[124],"multiprocessor":[125],"system.":[126],"Using":[127],"system,":[131],"demonstrate":[133],"that":[134],"improves":[136],"efficiency":[137],"in":[138,174],"incurring":[142],"little":[143],"performance":[144,168],"overhead.":[145],"In":[146],"particular,":[147],"real":[152],"multithreaded":[153],"workloads,":[154],"significantly":[157],"improve":[158],"utilization,":[160],"achieving":[161],"an":[162],"average":[163],"32%":[165],"better":[166],"wall-clock":[167],"than":[169],"MISP":[170],"without":[171],"multi-programming":[176],"environment.":[177]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}