{"id":"https://openalex.org/W2100610200","doi":"https://doi.org/10.1145/1233501.1233645","title":"Conjoining soft-core FPGA processors","display_name":"Conjoining soft-core FPGA processors","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2100610200","doi":"https://doi.org/10.1145/1233501.1233645","mag":"2100610200"},"language":"en","primary_location":{"id":"doi:10.1145/1233501.1233645","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233645","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design - ICCAD '06","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089654888","display_name":"David Sheldon","orcid":null},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Sheldon","raw_affiliation_strings":["Department of Computer Science and Engineering, University of California, Riverside. dsheldon@cs.ucr.edu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of California, Riverside. dsheldon@cs.ucr.edu","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067547869","display_name":"Rakesh Kumar","orcid":"https://orcid.org/0000-0002-3290-2629"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rakesh Kumar","raw_affiliation_strings":["Department of Computer Science and Engineering, University of California, San Diego. rakumar@cs.ucsd.edu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of California, San Diego. rakumar@cs.ucsd.edu","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001290812","display_name":"Frank Vahid","orcid":"https://orcid.org/0000-0001-5416-0032"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Frank Vahid","raw_affiliation_strings":["Department of Computer Science & Engineering, University of California, Riverside. vahid@cs.ucr.edu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, University of California, Riverside. vahid@cs.ucr.edu","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065583627","display_name":"Dean M. Tullsen","orcid":"https://orcid.org/0000-0003-3174-9316"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dean Tullsen","raw_affiliation_strings":["Department of Computer Science and Engineering, University of California, San Diego. tullsen@cs.ucsd.edu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of California, San Diego. tullsen@cs.ucsd.edu","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015269679","display_name":"Roman Lysecky","orcid":"https://orcid.org/0000-0002-5000-0848"},"institutions":[{"id":"https://openalex.org/I138006243","display_name":"University of Arizona","ror":"https://ror.org/03m2x1q45","country_code":"US","type":"education","lineage":["https://openalex.org/I138006243"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Roman Lysecky","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Arizona. rlysecky@ece.arizona.edu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Arizona. rlysecky@ece.arizona.edu","institution_ids":["https://openalex.org/I138006243"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.7855,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.83672714,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"694","last_page":"694"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6882296800613403},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6851891875267029},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.523931086063385},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.42099079489707947},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41039347648620605},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40696096420288086},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3211703300476074},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10779199004173279}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6882296800613403},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6851891875267029},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.523931086063385},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.42099079489707947},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41039347648620605},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40696096420288086},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3211703300476074},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10779199004173279}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1233501.1233645","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233645","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design - ICCAD '06","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2000591223","https://openalex.org/W2089402478","https://openalex.org/W2098681688","https://openalex.org/W2111488604","https://openalex.org/W2131167145","https://openalex.org/W2131442634","https://openalex.org/W2134382506","https://openalex.org/W2145252892","https://openalex.org/W2159449877","https://openalex.org/W2160737725"],"related_works":["https://openalex.org/W2488897859","https://openalex.org/W1980146226","https://openalex.org/W2002703587","https://openalex.org/W2366027386","https://openalex.org/W4255428424","https://openalex.org/W1566136542","https://openalex.org/W2163077378","https://openalex.org/W2811290777","https://openalex.org/W1823313045","https://openalex.org/W39695077"],"abstract_inverted_index":{"Soft-core":[0],"programmable":[1],"processors":[2,80],"on":[3,36,87],"field-programmable":[4],"gate":[5],"arrays":[6],"(FPGAs)":[7],"can":[8,51,81],"be":[9],"custom":[10,64,107],"synthesized":[11],"to":[12,28,42,103],"instantiate":[13],"only":[14],"those":[15],"hardware":[16,44,110],"units,":[17,23,111],"such":[18,62],"as":[19,63],"multipliers":[20],"and":[21,70,115],"floating-point":[22],"that":[24,77],"an":[25,98],"application":[26],"requires":[27],"meet":[29],"performance":[30],"demands,":[31],"thus":[32],"minimizing":[33],"soft-core":[34,54,119],"size":[35,85],"the":[37,105],"FPGA.":[38],"Conjoining":[39],"processors,":[40,50],"meaning":[41],"share":[43],"units":[45],"among":[46],"two":[47,79],"or":[48],"more":[49,57],"further":[52],"reduce":[53],"size,":[55],"leaving":[56],"resources":[58],"for":[59,118],"other":[60],"circuits":[61],"coprocessors.":[65],"Using":[66],"Xilinx":[67],"MicroBlaze":[68],"coprocessors":[69],"standard":[71],"embedded":[72],"system":[73],"benchmarks,":[74],"we":[75],"show":[76],"conjoining":[78],"provide":[82],"16%":[83],"processor":[84],"reductions":[86],"average,":[88],"with":[89],"less":[90],"than":[91],"1%":[92],"cycle":[93],"count":[94],"overhead.":[95],"We":[96],"introduce":[97],"efficient":[99],"dynamic-programming-based":[100],"exploration":[101],"method":[102],"find":[104],"best":[106],"instantiation":[108],"of":[109],"considering":[112],"both":[113],"standalone":[114],"conjoined":[116],"options,":[117],"processors.":[120]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}