{"id":"https://openalex.org/W2133215210","doi":"https://doi.org/10.1145/1233501.1233642","title":"Performances improvement of FPGA using novel multilevel hierarchical interconnection structure","display_name":"Performances improvement of FPGA using novel multilevel hierarchical interconnection structure","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2133215210","doi":"https://doi.org/10.1145/1233501.1233642","mag":"2133215210"},"language":"en","primary_location":{"id":"doi:10.1145/1233501.1233642","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233642","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design  - ICCAD '06","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112482028","display_name":"Hayder Mrabet","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Hayder Mrabet","raw_affiliation_strings":["Universit\u00e9 Pierre et Marie Curie, Paris, France,"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Pierre et Marie Curie, Paris, France,","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111822030","display_name":"Zied Marrakchi","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Zied Marrakchi","raw_affiliation_strings":["Universit\u00e9 Pierre et Marie Curie, Paris, France,"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Pierre et Marie Curie, Paris, France,","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004958069","display_name":"Pierre Souillot","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Pierre Souillot","raw_affiliation_strings":["Universit\u00e9 Pierre et Marie Curie, Paris, France,"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Pierre et Marie Curie, Paris, France,","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108405631","display_name":"Habib Mehrez","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Habib Mehrez","raw_affiliation_strings":["Universit\u00e9 Pierre et Marie Curie, Paris, France,"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Pierre et Marie Curie, Paris, France,","institution_ids":["https://openalex.org/I39804081"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5112482028"],"corresponding_institution_ids":["https://openalex.org/I39804081"],"apc_list":null,"apc_paid":null,"fwci":1.8805,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.86286363,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"675","last_page":"675"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.822900652885437},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7026792764663696},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6756314635276794},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4742509424686432},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4604329466819763},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21529367566108704},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.10714158415794373}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.822900652885437},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7026792764663696},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6756314635276794},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4742509424686432},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4604329466819763},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21529367566108704},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.10714158415794373}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1233501.1233642","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233642","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design  - ICCAD '06","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4399999976158142,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W1966573088","https://openalex.org/W1970296212","https://openalex.org/W1972887087","https://openalex.org/W2011403724","https://openalex.org/W2042876290","https://openalex.org/W2104033302","https://openalex.org/W2113645429","https://openalex.org/W2131280546","https://openalex.org/W2147506855","https://openalex.org/W2149090780","https://openalex.org/W2157958003","https://openalex.org/W2275304190"],"related_works":["https://openalex.org/W2980006224","https://openalex.org/W2063534976","https://openalex.org/W2153942622","https://openalex.org/W2402858125","https://openalex.org/W1569584894","https://openalex.org/W1956241453","https://openalex.org/W2616418345","https://openalex.org/W2320205417","https://openalex.org/W2128845608","https://openalex.org/W1997145140"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3],"new":[4],"Multilevel":[5],"hierarchical":[6],"FPGA":[7],"(MFPGA)":[8],"architecture":[9],"that":[10,38,74],"unifies":[11],"two":[12],"unidirectional":[13],"programmable":[14],"networks:":[15],"A":[16],"predictible":[17],"downward":[18],"network":[19,28],"based":[20,32,68],"on":[21,33,63,69],"the":[22,34,44,70],"Butterfly-Fat-Tree":[23],"topology,":[24],"and":[25,40,58],"an":[26,80],"upward":[27],"using":[29],"hierarchy.":[30],"Studies":[31],"Rent's":[35],"Rule":[36],"show":[37,73],"wiring":[39],"switch":[41],"requirements":[42],"in":[43,49,85],"MFPGA":[45,75],"grow":[46],"slower":[47],"than":[48],"traditional":[50],"topologies.":[51],"New":[52],"tools":[53],"are":[54],"developed":[55],"to":[56],"place":[57],"route":[59],"several":[60],"benchmark":[61],"circuits":[62,78],"this":[64],"architecture.":[65,91],"Experimental":[66],"results":[67],"MCNC":[71],"benchmarks":[72],"can":[76],"implement":[77],"with":[79,89],"average":[81],"gain":[82],"of":[83],"40%":[84],"total":[86],"area":[87],"compared":[88],"mesh":[90]},"counts_by_year":[{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}