{"id":"https://openalex.org/W2044259781","doi":"https://doi.org/10.1145/1233501.1233569","title":"Robust system level design with analog platforms","display_name":"Robust system level design with analog platforms","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2044259781","doi":"https://doi.org/10.1145/1233501.1233569","mag":"2044259781"},"language":"en","primary_location":{"id":"doi:10.1145/1233501.1233569","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233569","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design  - ICCAD '06","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049806627","display_name":"F. De Bernardinis","orcid":null},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"F. De Bernardinis","raw_affiliation_strings":["Universita di Pisa, Italy","Dipt. di Ingegneria dell'Informazione, Univ. di Pisa"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universita di Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Dipt. di Ingegneria dell'Informazione, Univ. di Pisa","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067636168","display_name":"Pierluigi Nuzzo","orcid":"https://orcid.org/0000-0003-2984-0364"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"P. Nuzzo","raw_affiliation_strings":["Universita di Pisa, Italy","Dipt. di Ingegneria dell'Informazione, Univ. di Pisa"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universita di Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Dipt. di Ingegneria dell'Informazione, Univ. di Pisa","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088660554","display_name":"Alberto Sangiovanni\u2010Vincentelli","orcid":"https://orcid.org/0000-0003-1298-8389"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Sangiovanni Vincentelli","raw_affiliation_strings":["University of California, Berkeley"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Berkeley","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.3006,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.87881027,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"334","last_page":"334"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.7840688824653625},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6539627909660339},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.4477807581424713},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.42651262879371643},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.42003658413887024},{"id":"https://openalex.org/keywords/design-process","display_name":"Design process","score":0.4183174669742584},{"id":"https://openalex.org/keywords/residual","display_name":"Residual","score":0.41201600432395935},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3649864196777344},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22266581654548645},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1977662444114685},{"id":"https://openalex.org/keywords/work-in-process","display_name":"Work in process","score":0.16296431422233582},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.15476495027542114}],"concepts":[{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.7840688824653625},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6539627909660339},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.4477807581424713},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.42651262879371643},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.42003658413887024},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.4183174669742584},{"id":"https://openalex.org/C155512373","wikidata":"https://www.wikidata.org/wiki/Q287450","display_name":"Residual","level":2,"score":0.41201600432395935},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3649864196777344},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22266581654548645},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1977662444114685},{"id":"https://openalex.org/C174998907","wikidata":"https://www.wikidata.org/wiki/Q357662","display_name":"Work in process","level":2,"score":0.16296431422233582},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.15476495027542114},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1233501.1233569","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233569","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design  - ICCAD '06","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W63658101","https://openalex.org/W1484970875","https://openalex.org/W1550100726","https://openalex.org/W1595067400","https://openalex.org/W1923938023","https://openalex.org/W1996190198","https://openalex.org/W2000836282","https://openalex.org/W2006846272","https://openalex.org/W2013990617","https://openalex.org/W2025995062","https://openalex.org/W2099528214","https://openalex.org/W2100128641","https://openalex.org/W2101468035","https://openalex.org/W2110224424","https://openalex.org/W2118327797","https://openalex.org/W2118606399","https://openalex.org/W2127149071","https://openalex.org/W2131900240","https://openalex.org/W2131926267","https://openalex.org/W2138396608","https://openalex.org/W2138908842","https://openalex.org/W2157722460","https://openalex.org/W2161299762","https://openalex.org/W2170120409","https://openalex.org/W2296319761"],"related_works":["https://openalex.org/W2560215812","https://openalex.org/W2949601986","https://openalex.org/W2788972299","https://openalex.org/W2521347458","https://openalex.org/W2498789492","https://openalex.org/W2729981612","https://openalex.org/W4233449973","https://openalex.org/W2925692864","https://openalex.org/W4391013256","https://openalex.org/W2768526084"],"abstract_inverted_index":{"An":[0],"approach":[1,111],"to":[2,30,75,93,103,118],"robust":[3,116],"system":[4,32,94],"level":[5,63,95],"mixed":[6],"signal":[7],"design":[8,91,97,127],"is":[9,123],"presented":[10],"based":[11],"on":[12],"analog":[13,96],"platforms.":[14],"The":[15,110],"bottom-up":[16],"characterization":[17],"phase":[18],"of":[19,107,115,128],"platform":[20],"components":[21],"provides":[22],"accurate":[23,61],"performance":[24,38],"models":[25,39,58],"that":[26,66,85],"export":[27],"architectural":[28,101],"constraints":[29,102],"the":[31,35,68,105,108,126],"level.":[33],"From":[34],"one":[36],"side,":[37],"can":[40],"be":[41,76,79],"affected":[42],"by":[43],"residual":[44],"errors":[45],"and":[46,53,90,133],"usually":[47],"do":[48],"not":[49],"consider":[50],"process":[51,71],"variations":[52],"modeling":[54],"uncertainties.":[55],"Conversely,":[56],"behavioral":[57],"cannot":[59],"match":[60],"circuit":[62,72],"simulations,":[64],"so":[65],"during":[67],"mapping":[69],"(exploration)":[70],"configurations":[73],"difficult":[74],"realized":[77],"may":[78],"obtained.":[80],"We":[81],"propose":[82],"a":[83,129,134],"methodology":[84],"extends":[86],"techniques":[87,117],"from":[88],"optimization":[89],"centering":[92],"exploiting":[98],"general,":[99],"implicit":[100],"control":[104],"robustness":[106],"solution.":[109],"allows":[112],"quantitative":[113],"extension":[114],"hierarchical":[119],"designs.":[120],"Its":[121],"effectiveness":[122],"illustrated":[124],"with":[125],"pipeline":[130],"A/D":[131],"converter":[132],"UMTS":[135],"receiver":[136],"front-end.":[137]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}