{"id":"https://openalex.org/W2105407012","doi":"https://doi.org/10.1145/1229175.1229176","title":"Predictive technology model for nano-CMOS design exploration","display_name":"Predictive technology model for nano-CMOS design exploration","publication_year":2007,"publication_date":"2007-04-01","ids":{"openalex":"https://openalex.org/W2105407012","doi":"https://doi.org/10.1145/1229175.1229176","mag":"2105407012"},"language":"en","primary_location":{"id":"doi:10.1145/1229175.1229176","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1229175.1229176","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072003003","display_name":"Wei Zhao","orcid":"https://orcid.org/0000-0002-6182-4746"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Wei Zhao","raw_affiliation_strings":["Arizona State University. Tempe, AZ"],"affiliations":[{"raw_affiliation_string":"Arizona State University. Tempe, AZ","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100740019","display_name":"Yu Cao","orcid":"https://orcid.org/0000-0001-6968-1180"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yu Cao","raw_affiliation_strings":["Arizona State University. Tempe, AZ"],"affiliations":[{"raw_affiliation_string":"Arizona State University. Tempe, AZ","institution_ids":["https://openalex.org/I55732556"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5072003003"],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":16.8641,"has_fulltext":false,"cited_by_count":254,"citation_normalized_percentile":{"value":0.99435667,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":100},"biblio":{"volume":"3","issue":"1","first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.9038531184196472},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8135240077972412},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6245529651641846},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.5903297662734985},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.504254937171936},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.43460050225257874},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.432876318693161},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.42320218682289124},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.37418532371520996},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3125191330909729},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26429885625839233},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.21939662098884583},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21332401037216187}],"concepts":[{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.9038531184196472},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8135240077972412},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6245529651641846},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.5903297662734985},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.504254937171936},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.43460050225257874},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.432876318693161},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.42320218682289124},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.37418532371520996},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3125191330909729},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26429885625839233},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.21939662098884583},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21332401037216187},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1229175.1229176","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1229175.1229176","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5699999928474426,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1550639219","https://openalex.org/W1558250750","https://openalex.org/W1590689908","https://openalex.org/W1592319757","https://openalex.org/W1819535044","https://openalex.org/W1949058485","https://openalex.org/W2104550515","https://openalex.org/W2107737526","https://openalex.org/W2108880814","https://openalex.org/W2110934172","https://openalex.org/W2126333818","https://openalex.org/W2142796540","https://openalex.org/W2144969589","https://openalex.org/W2151532256","https://openalex.org/W2154941994","https://openalex.org/W2155916338","https://openalex.org/W2170935054","https://openalex.org/W2532215754","https://openalex.org/W2532895182","https://openalex.org/W2535384862","https://openalex.org/W2536315842","https://openalex.org/W2537197078","https://openalex.org/W2540308604","https://openalex.org/W2544418166","https://openalex.org/W2545094816","https://openalex.org/W2545215987","https://openalex.org/W4235859794","https://openalex.org/W4240753366","https://openalex.org/W4247470388","https://openalex.org/W4254071613","https://openalex.org/W6681385363"],"related_works":["https://openalex.org/W2730314563","https://openalex.org/W1985921646","https://openalex.org/W2164005033","https://openalex.org/W2180089987","https://openalex.org/W1985584924","https://openalex.org/W2030839013","https://openalex.org/W2154055667","https://openalex.org/W2060944147","https://openalex.org/W2006886358","https://openalex.org/W2143500360"],"abstract_inverted_index":{"A":[0],"predictive":[1],"MOSFET":[2],"model":[3],"is":[4,22,93,105,126],"critical":[5],"for":[6,108],"early":[7,43],"circuit":[8],"design":[9],"research.":[10],"In":[11],"this":[12],"work,":[13],"a":[14,82],"new":[15,115],"generation":[16],"of":[17,48,85,90,102],"Predictive":[18],"Technology":[19],"Model":[20],"(PTM)":[21],"developed,":[23],"covering":[24],"emerging":[25],"physical":[26,40],"effects":[27],"and":[28,42,50,111],"alternative":[29],"structures,":[30],"such":[31],"as":[32],"the":[33,100,103,114,122],"double-gate":[34,51],"device":[35],"(i.e.,":[36],"FinFET).":[37],"Based":[38],"on":[39],"models":[41],"stage":[44],"silicon":[45,98],"data,":[46],"PTM":[47,75,91,116,125],"bulk":[49],"devices":[52],"are":[53],"successfully":[54],"generated":[55],"from":[56],"130nm":[57],"to":[58,67,80],"32nm":[59],"technology":[60],"nodes,":[61],"with":[62,96],"effective":[63],"channel":[64],"length":[65],"down":[66],"13nm.":[68],"By":[69],"tuning":[70],"only":[71],"ten":[72],"primary":[73],"parameters,":[74],"can":[76],"be":[77],"easily":[78],"customized":[79],"cover":[81],"wide":[83],"range":[84],"process":[86,119],"uncertainties.":[87],"The":[88],"accuracy":[89],"predictions":[92],"comprehensively":[94],"verified":[95],"published":[97],"data:":[99],"error":[101],"current":[104],"below":[106],"10%":[107],"both":[109],"NMOS":[110],"PMOS.":[112],"Furthermore,":[113],"correctly":[117],"captures":[118],"sensitivities":[120],"in":[121],"nanometer":[123],"regime.":[124],"available":[127],"online":[128],"at":[129],"http://www.eas.asu.edu/~ptm.":[130]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":13},{"year":2023,"cited_by_count":15},{"year":2022,"cited_by_count":10},{"year":2021,"cited_by_count":13},{"year":2020,"cited_by_count":11},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":14},{"year":2017,"cited_by_count":14},{"year":2016,"cited_by_count":12},{"year":2015,"cited_by_count":13},{"year":2014,"cited_by_count":16},{"year":2013,"cited_by_count":20},{"year":2012,"cited_by_count":18}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}