{"id":"https://openalex.org/W2145539779","doi":"https://doi.org/10.1145/1228784.1228797","title":"NostraXtalk","display_name":"NostraXtalk","publication_year":2007,"publication_date":"2007-03-11","ids":{"openalex":"https://openalex.org/W2145539779","doi":"https://doi.org/10.1145/1228784.1228797","mag":"2145539779"},"language":"en","primary_location":{"id":"doi:10.1145/1228784.1228797","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1228784.1228797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111922604","display_name":"Debasish Das","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Debasish Das","raw_affiliation_strings":["Northwestern University, Evanston, IL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston, IL","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049836523","display_name":"Ahmed Shebaita","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ahmed Shebaita","raw_affiliation_strings":["Northwestern University, Evanston, IL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston, IL","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084980840","display_name":"Yehea Ismail","orcid":"https://orcid.org/0000-0003-3956-7533"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yehea Ismail","raw_affiliation_strings":["Northwestern University, Evanston, IL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston, IL","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103038285","display_name":"Hai Zhou","orcid":"https://orcid.org/0000-0003-4824-7179"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hai Zhou","raw_affiliation_strings":["Northwestern University, Evanston, IL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston, IL","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037460485","display_name":"Kip Killpack","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kip Killpack","raw_affiliation_strings":["Northwestern University, Evanston, IL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston, IL","institution_ids":["https://openalex.org/I111979921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.0777,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.80357607,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"25","last_page":"30"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.7611744403839111},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.717745840549469},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.681198239326477},{"id":"https://openalex.org/keywords/coupling","display_name":"Coupling (piping)","score":0.6534260511398315},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5406756401062012},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5086461305618286},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5060529112815857},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.44874307513237},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4370948076248169},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22084155678749084},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17893698811531067},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1652957797050476},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.10347038507461548}],"concepts":[{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.7611744403839111},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.717745840549469},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.681198239326477},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.6534260511398315},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5406756401062012},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5086461305618286},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5060529112815857},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.44874307513237},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4370948076248169},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22084155678749084},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17893698811531067},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1652957797050476},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.10347038507461548},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1228784.1228797","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1228784.1228797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1556099140","https://openalex.org/W1599867408","https://openalex.org/W2072350000","https://openalex.org/W2093397547","https://openalex.org/W2102022659","https://openalex.org/W2124335830","https://openalex.org/W2125115744","https://openalex.org/W2134067926","https://openalex.org/W2151400049","https://openalex.org/W2154144231","https://openalex.org/W2162523242","https://openalex.org/W2165210723","https://openalex.org/W2171509020","https://openalex.org/W2171533011","https://openalex.org/W4300885858","https://openalex.org/W6673656472"],"related_works":["https://openalex.org/W2289987414","https://openalex.org/W2386114299","https://openalex.org/W2766876417","https://openalex.org/W2347291799","https://openalex.org/W2111457822","https://openalex.org/W2350165513","https://openalex.org/W2362612617","https://openalex.org/W2145539779","https://openalex.org/W2518203484","https://openalex.org/W2132496963"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2,68],"a":[3,25,40,48,69],"predictive":[4],"framework":[5,67,100],"for":[6,57],"accurate":[7,75],"static":[8,115],"timing":[9,45,60,116],"analysis":[10],"in":[11,28,42],"UDSM":[12],"VLSI":[13],"circuits.":[14],"As":[15],"technology":[16],"scales":[17],"to":[18,35,73,92],"smaller":[19],"dimensions,":[20],"coupling":[21,53,76,112],"capacitances":[22,33],"are":[23],"becoming":[24],"critical":[26],"factor":[27],"signal":[29,62],"integrity":[30,63],"analysis.":[31,64,117],"Coupling":[32],"contribute":[34],"the":[36,44,86,111],"noise":[37],"and":[38,61,84],"play":[39],"seminalrole":[41],"determining":[43],"windows":[46],"of":[47,52],"circuit.":[49],"Accuratean":[50],"alysis":[51],"effects":[54],"is":[55],"indispensable":[56],"meaning":[58],"fulstatic":[59],"Our":[65,108],"proposed":[66],"Directed":[70],"Search":[71],"technique":[72],"calculate":[74],"effects.":[77],"We":[78,95],"performed":[79],"experiments":[80],"on":[81,114],"theISCAS'85":[82],"benchmarks":[83],"present":[85,110],"accuracy":[87],"improvement":[88],"up-to":[89,106],"45.5%":[90],"compared":[91],"existing":[93],"approaches.":[94],"also":[96],"show":[97],"that":[98],"our":[99],"decreased":[101],"cell":[102],"delay":[103],"look-uptable":[104],"accesses":[105],"64.8%.":[107],"results":[109],"effect":[113]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}