{"id":"https://openalex.org/W4240599084","doi":"https://doi.org/10.1145/1217088.1217095","title":"Hierarchical partitioning of VLSI floorplans by staircases","display_name":"Hierarchical partitioning of VLSI floorplans by staircases","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W4240599084","doi":"https://doi.org/10.1145/1217088.1217095"},"language":"en","primary_location":{"id":"doi:10.1145/1217088.1217095","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1217088.1217095","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033411778","display_name":"Subhashis Majumder","orcid":"https://orcid.org/0000-0002-0849-9016"},"institutions":[{"id":"https://openalex.org/I188963388","display_name":"International Institute of Information Technology","ror":"https://ror.org/02dernx73","country_code":"IN","type":"education","lineage":["https://openalex.org/I188963388"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Subhashis Majumder","raw_affiliation_strings":["International Institute of Information Technology, Kolkata, India"],"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology, Kolkata, India","institution_ids":["https://openalex.org/I188963388"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021904459","display_name":"Susmita Sur\u2010Kolay","orcid":"https://orcid.org/0000-0002-2052-3779"},"institutions":[{"id":"https://openalex.org/I6498739","display_name":"Indian Statistical Institute","ror":"https://ror.org/00q2w1j53","country_code":"IN","type":"education","lineage":["https://openalex.org/I6498739"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Susmita Sur-Kolay","raw_affiliation_strings":["Indian Statistical Institute, Kolkata, India"],"affiliations":[{"raw_affiliation_string":"Indian Statistical Institute, Kolkata, India","institution_ids":["https://openalex.org/I6498739"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067730042","display_name":"Bhargab B. Bhattacharya","orcid":"https://orcid.org/0000-0002-5890-2483"},"institutions":[{"id":"https://openalex.org/I6498739","display_name":"Indian Statistical Institute","ror":"https://ror.org/00q2w1j53","country_code":"IN","type":"education","lineage":["https://openalex.org/I6498739"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bhargab B. Bhattacharya","raw_affiliation_strings":["Indian Statistical Institute, Kolkata, India"],"affiliations":[{"raw_affiliation_string":"Indian Statistical Institute, Kolkata, India","institution_ids":["https://openalex.org/I6498739"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101154945","display_name":"Swarup Kumar Das","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100231","display_name":"Calcutta Research Group","ror":"https://ror.org/0105syj83","country_code":"IN","type":"other","lineage":["https://openalex.org/I4210100231"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Swarup Kumar Das","raw_affiliation_strings":["Calcutta Technical Institute, Kolkata, India"],"affiliations":[{"raw_affiliation_string":"Calcutta Technical Institute, Kolkata, India","institution_ids":["https://openalex.org/I4210100231"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5033411778"],"corresponding_institution_ids":["https://openalex.org/I188963388"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.43882459,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"12","issue":"1","first_page":"7","last_page":"es"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.929172933101654},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7380712032318115},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.733771800994873},{"id":"https://openalex.org/keywords/monotone-polygon","display_name":"Monotone polygon","score":0.7236316800117493},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6959744691848755},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.6791878342628479},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.6030240058898926},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.5372011661529541},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4870794117450714},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.43332424759864807},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.42871519923210144},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24228736758232117},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.22101262211799622},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1782708764076233},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.06905117630958557}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.929172933101654},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7380712032318115},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.733771800994873},{"id":"https://openalex.org/C2834757","wikidata":"https://www.wikidata.org/wiki/Q4925424","display_name":"Monotone polygon","level":2,"score":0.7236316800117493},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6959744691848755},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.6791878342628479},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.6030240058898926},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.5372011661529541},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4870794117450714},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.43332424759864807},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.42871519923210144},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24228736758232117},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.22101262211799622},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1782708764076233},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.06905117630958557},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1217088.1217095","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1217088.1217095","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities","score":0.7900000214576721}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2133901311","https://openalex.org/W2087871358","https://openalex.org/W2136768364","https://openalex.org/W4386643835","https://openalex.org/W2120361800","https://openalex.org/W2182445672","https://openalex.org/W2781601456","https://openalex.org/W3010631755","https://openalex.org/W2181385951","https://openalex.org/W2783276420"],"abstract_inverted_index":{"This":[0],"article":[1],"addresses":[2],"the":[3,19,38,42,51,57,62],"problem":[4,67],"of":[5,18,27,41,53,59,68],"recursively":[6],"bipartitioning":[7,70],"a":[8,21,77,83],"given":[9],"floorplan":[10],"F":[11,28],"using":[12],"monotone":[13,22],"staircases.":[14],"At":[15],"each":[16],"level":[17],"hierarchy,":[20],"staircase":[23,63],"from":[24],"one":[25],"corner":[26,32],"to":[29,73,88,97],"its":[30],"opposite":[31],"is":[33,64,71,80],"identified,":[34],"such":[35],"that":[36],"(i)":[37],"two":[39],"parts":[40],"bipartition":[43],"are":[44],"nearly":[45],"equal":[46],"in":[47,50,91],"area":[48],"(or":[49],"number":[52,58],"blocks),":[54],"and":[55,76,95],"(ii)":[56],"nets":[60],"crossing":[61],"minimal.":[65],"The":[66],"area-balanced":[69],"shown":[72],"be":[74,86],"NP-hard,":[75],"maxflow-based":[78],"heuristic":[79],"proposed.":[81],"Such":[82],"hierarchy":[84],"may":[85],"useful":[87],"repeater":[89],"placement":[90],"deep-submicron":[92],"physical":[93],"design,":[94],"also":[96],"global":[98],"routing.":[99]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}