{"id":"https://openalex.org/W2142487152","doi":"https://doi.org/10.1145/1176760.1176792","title":"Syntax-driven implementation of software programming language control constructs and expressions on FPGAs","display_name":"Syntax-driven implementation of software programming language control constructs and expressions on FPGAs","publication_year":2006,"publication_date":"2006-10-22","ids":{"openalex":"https://openalex.org/W2142487152","doi":"https://doi.org/10.1145/1176760.1176792","mag":"2142487152"},"language":"en","primary_location":{"id":"doi:10.1145/1176760.1176792","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1176760.1176792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086605034","display_name":"Neil Audsley","orcid":"https://orcid.org/0000-0003-3739-6590"},"institutions":[{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Neil C. Audsley","raw_affiliation_strings":["University of York, York, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of York, York, UK","institution_ids":["https://openalex.org/I52099693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049147939","display_name":"M. Ward","orcid":null},"institutions":[{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Michael Ward","raw_affiliation_strings":["University of York, York, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of York, York, UK","institution_ids":["https://openalex.org/I52099693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.16529346,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"253","last_page":"260"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8726164102554321},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.7364829778671265},{"id":"https://openalex.org/keywords/syntax","display_name":"Syntax","score":0.5166680812835693},{"id":"https://openalex.org/keywords/high-level-programming-language","display_name":"High-level programming language","score":0.46671077609062195},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4328610897064209},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.43259257078170776},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.41810423135757446},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.27923959493637085},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2448684275150299},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.22503569722175598},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.13264736533164978}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8726164102554321},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.7364829778671265},{"id":"https://openalex.org/C60048249","wikidata":"https://www.wikidata.org/wiki/Q37437","display_name":"Syntax","level":2,"score":0.5166680812835693},{"id":"https://openalex.org/C19024347","wikidata":"https://www.wikidata.org/wiki/Q211496","display_name":"High-level programming language","level":3,"score":0.46671077609062195},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4328610897064209},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.43259257078170776},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.41810423135757446},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.27923959493637085},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2448684275150299},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.22503569722175598},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.13264736533164978},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1176760.1176792","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1176760.1176792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.415.6177","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.415.6177","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.york.ac.uk/rts/docs/CODES-EMSOFT-CASES-2006/cases/p253.pdf","raw_type":"text"},{"id":"pmh:oai:eprints.whiterose.ac.uk:6377","is_oa":false,"landing_page_url":"http://eprints.whiterose.ac.uk/6377/","pdf_url":null,"source":{"id":"https://openalex.org/S4306400854","display_name":"White Rose Research Online (University of Leeds, The University of Sheffield, University of York)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I2800616092","host_organization_name":"White Rose University Consortium","host_organization_lineage":["https://openalex.org/I2800616092"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Proceedings Paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W49604031","https://openalex.org/W959975051","https://openalex.org/W1491178396","https://openalex.org/W1494930385","https://openalex.org/W1500117749","https://openalex.org/W1514258760","https://openalex.org/W1543657314","https://openalex.org/W1546256036","https://openalex.org/W2117047970","https://openalex.org/W2129578519","https://openalex.org/W2138098630","https://openalex.org/W2614344471","https://openalex.org/W6677038328"],"related_works":["https://openalex.org/W134217928","https://openalex.org/W2018292908","https://openalex.org/W2010145286","https://openalex.org/W2029108800","https://openalex.org/W2133376498","https://openalex.org/W2081941946","https://openalex.org/W4318619745","https://openalex.org/W158224001","https://openalex.org/W3188066173","https://openalex.org/W2131339604"],"abstract_inverted_index":{"This":[0],"paper":[1],"considers":[2],"the":[3,48,52,61,66,79,96,149],"efficient":[4],"parallel":[5],"implementation":[6],"of":[7,26,51,95,102],"control":[8,71],"constructs":[9],"and":[10,19,57,81,109,123],"expressions":[11],"written":[12],"in":[13,60,106,134],"a":[14,38,90,118,127],"common":[15],"software":[16,40,98],"programming":[17,41],"language":[18,42,53,112],"synthesised":[20],"to":[21,73],"FPGA":[22],"platforms.":[23],"The":[24,86,100],"context":[25],"this":[27,103],"work":[28],"are":[29,89],"Syntax-Driven":[30],"Language":[31],"Specific":[32],"Processors":[33],"(SDLSP).":[34],"An":[35],"SDLSP":[36],"for":[37,148],"given":[39],"has":[43],"its":[44,107],"architecture":[45],"defined":[46],"by":[47],"grammar":[49,62],"rules":[50],"itself.":[54],"Each":[55],"statement":[56],"expression":[58],"rule":[59],"is":[63],"implemented":[64],"on":[65,121],"FPGA,":[67,122],"together":[68],"with":[69,83,126],"sufficient":[70],"logic":[72],"load":[74],"program":[75,84],"statements":[76,125],"sequentially":[77],"onto":[78],"processor,":[80],"interface":[82],"store.":[85],"instructions":[87],"executed":[88],"high-level":[91],"(effectively":[92],"one-to-one)":[93],"encoding":[94],"application":[97],"program.":[99],"advantages":[101],"approach":[104],"lie":[105],"parallelism":[108],"space-efficiency.":[110],"Syntax-driven":[111],"processors":[113],"take":[114,130],"less":[115,132],"space":[116,133],"than":[117,136],"full":[119],"CPU":[120],"execute":[124],"comparable":[128],"speed;":[129],"significantly":[131],"general":[135],"directly":[137],"compiled":[138],"approaches":[139],"(such":[140],"as":[141],"Handel-C),":[142],"although":[143],"have":[144],"longer":[145],"execution":[146],"times":[147],"same":[150],"code.":[151]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}