{"id":"https://openalex.org/W2127221256","doi":"https://doi.org/10.1145/1176254.1176302","title":"A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation","display_name":"A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation","publication_year":2006,"publication_date":"2006-10-22","ids":{"openalex":"https://openalex.org/W2127221256","doi":"https://doi.org/10.1145/1176254.1176302","mag":"2127221256"},"language":"en","primary_location":{"id":"doi:10.1145/1176254.1176302","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1176254.1176302","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 4th international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044155921","display_name":"Wei Qin","orcid":"https://orcid.org/0000-0003-1766-8245"},"institutions":[{"id":"https://openalex.org/I111088046","display_name":"Boston University","ror":"https://ror.org/05qwgg493","country_code":"US","type":"education","lineage":["https://openalex.org/I111088046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wei Qin","raw_affiliation_strings":["Boston University, Boston, MA, USA","Boston University , Boston , MA , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Boston University, Boston, MA, USA","institution_ids":[]},{"raw_affiliation_string":"Boston University , Boston , MA , USA","institution_ids":["https://openalex.org/I111088046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021419304","display_name":"Joseph D'Errico","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095037","display_name":"Cavium (United States)","ror":"https://ror.org/00qbcq685","country_code":"US","type":"company","lineage":["https://openalex.org/I4210095037"]},{"id":"https://openalex.org/I4210160795","display_name":"Praevium Research (United States)","ror":"https://ror.org/04t5n6k60","country_code":"US","type":"company","lineage":["https://openalex.org/I4210160795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Joseph D'Errico","raw_affiliation_strings":["Cavium Networks, Inc., Marlborough, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cavium Networks, Inc., Marlborough, MA, USA","institution_ids":["https://openalex.org/I4210095037","https://openalex.org/I4210160795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037646962","display_name":"Xinping Zhu","orcid":null},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xinping Zhu","raw_affiliation_strings":["Northeastern University, Boston, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":43,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"49","issue":null,"first_page":"193","last_page":"198"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.86982262134552},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.81839519739151},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5798476934432983},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5296269059181213},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.5140637159347534},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5098335146903992},{"id":"https://openalex.org/keywords/consistency","display_name":"Consistency (knowledge bases)","score":0.48607853055000305},{"id":"https://openalex.org/keywords/spec#","display_name":"Spec#","score":0.4673381745815277},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4240916967391968},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.41782674193382263},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3601360321044922},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.22794011235237122},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07339546084403992}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.86982262134552},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.81839519739151},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5798476934432983},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5296269059181213},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.5140637159347534},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5098335146903992},{"id":"https://openalex.org/C2776436953","wikidata":"https://www.wikidata.org/wiki/Q5163215","display_name":"Consistency (knowledge bases)","level":2,"score":0.48607853055000305},{"id":"https://openalex.org/C2778565505","wikidata":"https://www.wikidata.org/wiki/Q2207566","display_name":"Spec#","level":2,"score":0.4673381745815277},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4240916967391968},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.41782674193382263},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3601360321044922},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.22794011235237122},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07339546084403992}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1176254.1176302","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1176254.1176302","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 4th international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1555243107","https://openalex.org/W1999421692","https://openalex.org/W2013471886","https://openalex.org/W2022740893","https://openalex.org/W2059807497","https://openalex.org/W2073418263","https://openalex.org/W2085800120","https://openalex.org/W2102043677","https://openalex.org/W2102570774","https://openalex.org/W2131493012","https://openalex.org/W2141711229","https://openalex.org/W2157676568","https://openalex.org/W2163935347","https://openalex.org/W4232896609","https://openalex.org/W6665642939"],"related_works":["https://openalex.org/W878150521","https://openalex.org/W2008941207","https://openalex.org/W2373662841","https://openalex.org/W1970478390","https://openalex.org/W1533638723","https://openalex.org/W294916044","https://openalex.org/W2014546971","https://openalex.org/W4248631090","https://openalex.org/W2131667412","https://openalex.org/W2019959197"],"abstract_inverted_index":{"Traditionally,":[0],"instruction-set":[1],"simulators":[2],"(ISS's)":[3],"are":[4,102,122],"sequential":[5],"programs":[6],"running":[7],"on":[8,116,140],"individual":[9],"processors.":[10,29,127],"Besides":[11],"the":[12,23,32,69,72,106,112,119,149,156,161,165,197],"advances":[13],"of":[14,27,34,65,71,79,187],"simulation":[15,76,115],"techniques,":[16],"ISS's":[17],"have":[18],"been":[19],"mainly":[20],"driven":[21],"by":[22],"continuously":[24],"improving":[25],"performance":[26,53,172],"single":[28],"However,":[30],"since":[31],"focus":[33],"processor":[35],"manufacturers":[36],"is":[37,74,181,196],"shifting":[38],"from":[39],"frequency":[40],"scaling":[41],"to":[42,47,61,105,204],"multiprocessing,":[43],"ISS":[44],"developers":[45],"need":[46],"seize":[48],"this":[49,137,195],"opportunity":[50],"for":[51,148,155],"further":[52],"growth.":[54],"This":[55],"paper":[56],"proposes":[57],"a":[58,75],"multiprocessing":[59,169,203],"approach":[60,73,138,180,200],"accelerate":[62,205],"one":[63,117],"class":[64],"dynamic-compiled":[66],"ISS's.":[67],"At":[68],"heart":[70],"engine":[77,86,107,113],"capable":[78,186],"mixed":[80],"interpretative":[81],"and":[82,93,152,173,185],"compiled":[83],"simulation.":[84,207],"The":[85],"selects":[87],"frequently":[88],"executed":[89],"target":[90],"code":[91],"blocks":[92],"translates":[94],"them":[95],"into":[96],"dynamically":[97],"loaded":[98],"libraries":[99],"(DLLs),":[100],"which":[101],"then":[103],"linked":[104],"at":[108],"run":[109],"time.":[110],"While":[111],"performs":[114],"processor,":[118],"translation":[120],"tasks":[121],"distributed":[123],"among":[124],"several":[125],"assistant":[126],"Our":[128],"experiment":[129],"results":[130],"using":[131],"SPEC":[132],"CINT2000":[133],"benchmarks":[134],"show":[135],"that":[136,201],"achieves":[139],"average":[141],"197":[142],"million":[143],"instructions":[144],"per":[145],"second":[146],"(MIPS)":[147],"MIPS32":[150],"ISA":[151],"133":[153],"MIPS":[154],"ARM":[157],"V4ISA.":[158],"Compared":[159],"with":[160],"uniprocessing":[162],"configuration":[163],"under":[164],"same":[166],"general":[167],"approach,":[168],"offers":[170],"higher":[171],"improved":[174],"speed":[175],"consistency.":[176],"In":[177],"addition,":[178],"our":[179,192],"highly":[182],"retargetable,":[183],"portable":[184],"simulating":[188],"self-modifying":[189],"code.":[190],"To":[191],"best":[193],"knowledge,":[194],"first":[198],"reported":[199],"uses":[202],"functional":[206]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":6}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
