{"id":"https://openalex.org/W2139340565","doi":"https://doi.org/10.1145/1165573.1165581","title":"Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)","display_name":"Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2139340565","doi":"https://doi.org/10.1145/1165573.1165581","mag":"2139340565"},"language":"en","primary_location":{"id":"doi:10.1145/1165573.1165581","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1165573.1165581","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international symposium on Low power electronics and design  - ISLPED '06","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090878992","display_name":"Samuel Rodr\u00edguez","orcid":"https://orcid.org/0000-0002-5869-3896"},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Samuel Rodriguez","raw_affiliation_strings":["University of Maryland, College Park","Electrical and Computer Engineering Department, University of Maryland, College Park. samvr@eng.umd.edu"],"affiliations":[{"raw_affiliation_string":"University of Maryland, College Park","institution_ids":["https://openalex.org/I66946132"]},{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Maryland, College Park. samvr@eng.umd.edu","institution_ids":["https://openalex.org/I66946132"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047597896","display_name":"Bruce Jacob","orcid":"https://orcid.org/0009-0005-3493-8245"},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bruce Jacob","raw_affiliation_strings":["University of Maryland, College Park","Electrical and Computer Engineering Department, University of Maryland, College Park. blj@eng.umd.edu"],"affiliations":[{"raw_affiliation_string":"University of Maryland, College Park","institution_ids":["https://openalex.org/I66946132"]},{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Maryland, College Park. blj@eng.umd.edu","institution_ids":["https://openalex.org/I66946132"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5090878992"],"corresponding_institution_ids":["https://openalex.org/I66946132"],"apc_list":null,"apc_paid":null,"fwci":6.893,"has_fulltext":false,"cited_by_count":55,"citation_normalized_percentile":{"value":0.97049048,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"25","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8658534288406372},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.623666524887085},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6193563938140869},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.6178754568099976},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5080742835998535},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.5051687359809875},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.4784959852695465},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44936054944992065},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.44189831614494324},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.43359285593032837},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.42715775966644287},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41866278648376465},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.3624331057071686},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11672458052635193}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8658534288406372},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.623666524887085},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6193563938140869},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.6178754568099976},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5080742835998535},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.5051687359809875},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.4784959852695465},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44936054944992065},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.44189831614494324},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.43359285593032837},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.42715775966644287},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41866278648376465},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.3624331057071686},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11672458052635193},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1165573.1165581","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1165573.1165581","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international symposium on Low power electronics and design  - ISLPED '06","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.79.4011","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.79.4011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.umd.edu/~blj/papers/islped2006.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W118432253","https://openalex.org/W1548099865","https://openalex.org/W1608393288","https://openalex.org/W1949737515","https://openalex.org/W2050589795","https://openalex.org/W2083626899","https://openalex.org/W2112752462","https://openalex.org/W2136276416","https://openalex.org/W2143310750","https://openalex.org/W2150073849","https://openalex.org/W2154941994","https://openalex.org/W2165788555","https://openalex.org/W2169263481","https://openalex.org/W2171212820","https://openalex.org/W2171908300","https://openalex.org/W3172772885"],"related_works":["https://openalex.org/W2148571123","https://openalex.org/W4312759433","https://openalex.org/W2161101294","https://openalex.org/W2290179447","https://openalex.org/W2026179701","https://openalex.org/W4380881125","https://openalex.org/W2365803410","https://openalex.org/W273173017","https://openalex.org/W2155502730","https://openalex.org/W2086718556"],"abstract_inverted_index":{"As":[0],"transistors":[1],"continue":[2],"to":[3,27,39,55,101,106,160],"scale":[4],"down":[5],"into":[6],"the":[7,15,43,46,49,80,127,143,183],"nanometer":[8,22,69,86,134],"regime,":[9],"device":[10],"leakage":[11,30,123,141,153],"currents":[12],"are":[13,37],"becoming":[14,126],"dominant":[16,128],"cause":[17,129,145],"of":[18,45,51,67,130,146,190],"power":[19,81,131,148,180],"dissipation":[20,74,132],"in":[21,133],"caches,":[23],"making":[24],"it":[25],"essential":[26],"model":[28],"these":[29],"effects":[31,50],"properly.":[32],"Moreover,":[33],"typical":[34],"microprocessor":[35],"caches":[36,70],"pipelined":[38,68,92],"keep":[40],"up":[41],"with":[42,71],"speed":[44],"processor,":[47],"and":[48,78,108,114,150],"pipelining":[52,175],"overhead":[53,176],"need":[54],"be":[56],"properly":[57],"accounted":[58],"for.In":[59],"this":[60],"paper,":[61],"we":[62,118],"present":[63],"a":[64,85,90,157,187],"detailed":[65,72],"study":[66],"energy/power":[73],"breakdowns":[75],"showing":[76],"where":[77],"how":[79],"is":[82,124,142,177,186],"dissipated":[83,181],"within":[84],"cache.":[87],"We":[88,137,168],"explore":[89],"three-dimensional":[91],"cache":[93,98,103,121,162,174,191],"design":[94],"space":[95],"that":[96,120,139,151,171],"includes":[97],"size":[99],"(16kB":[100],"512kB),":[102],"associativity":[104],"(direct-mapped":[105],"16-way)":[107],"process":[109],"technology":[110,135],"(90nm,":[111],"65nm,":[112],"45nm":[113],"32nm).Among":[115],"our":[116],"findings,":[117],"show":[119,138,170],"bitline":[122],"increasingly":[125],"nodes.":[136],"subthreshold":[140],"main":[144],"static":[147],"dissipation,":[149],"gate":[152],"is,":[154],"surprisingly,":[155],"not":[156],"significant":[158,188],"contributor":[159],"total":[161],"power,":[163],"even":[164],"for":[165,173],"32nm":[166],"caches.":[167],"also":[169],"accounting":[172],"necessary,":[178],"as":[179],"by":[182],"pipeline":[184],"elements":[185],"part":[189],"power.":[192]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":10},{"year":2012,"cited_by_count":4}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}