{"id":"https://openalex.org/W2072395740","doi":"https://doi.org/10.1145/1165573.1165577","title":"Analysis of super cut-off transistors for ultralow power digital logic circuits","display_name":"Analysis of super cut-off transistors for ultralow power digital logic circuits","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2072395740","doi":"https://doi.org/10.1145/1165573.1165577","mag":"2072395740"},"language":"en","primary_location":{"id":"doi:10.1145/1165573.1165577","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1165573.1165577","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international symposium on Low power electronics and design  - ISLPED '06","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091408102","display_name":"Arijit Raychowdhury","orcid":"https://orcid.org/0000-0001-8391-0576"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Arijit Raychowdhury","raw_affiliation_strings":["Purdue University, IN","Department of Electrical and Computer Engineering, Purdue University, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, IN","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Purdue University, IN, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085588788","display_name":"Xuanyao Fong","orcid":"https://orcid.org/0000-0001-5939-7389"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xuanyao Fong","raw_affiliation_strings":["Purdue University, IN","Department of Electrical and Computer Engineering, Purdue University, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, IN","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Purdue University, IN, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006590078","display_name":"Qikai Chen","orcid":"https://orcid.org/0009-0001-2630-2926"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Qikai Chen","raw_affiliation_strings":["Purdue University, IN","Department of Electrical and Computer Engineering, Purdue University, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, IN","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Purdue University, IN, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031161187","display_name":"Kaushik Roy","orcid":"https://orcid.org/0009-0002-3375-2877"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushik Roy","raw_affiliation_strings":["Purdue University, IN","Department of Electrical and Computer Engineering, Purdue University, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, IN","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Purdue University, IN, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5091408102"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":1.8805,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.85698971,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"2","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.730575442314148},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.6858851313591003},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.652755856513977},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6493839025497437},{"id":"https://openalex.org/keywords/subthreshold-slope","display_name":"Subthreshold slope","score":0.6101595163345337},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5722452402114868},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5343752503395081},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5037557482719421},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4942748546600342},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.4885495603084564},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.483837753534317},{"id":"https://openalex.org/keywords/quantum-tunnelling","display_name":"Quantum tunnelling","score":0.47542622685432434},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.443251371383667},{"id":"https://openalex.org/keywords/ultra-low-power","display_name":"Ultra low power","score":0.4325205087661743},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.42392098903656006},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.37322887778282166},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3400043845176697},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21209141612052917},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16430634260177612},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.14873340725898743},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.08472037315368652}],"concepts":[{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.730575442314148},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.6858851313591003},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.652755856513977},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6493839025497437},{"id":"https://openalex.org/C103566474","wikidata":"https://www.wikidata.org/wiki/Q7632226","display_name":"Subthreshold slope","level":5,"score":0.6101595163345337},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5722452402114868},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5343752503395081},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5037557482719421},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4942748546600342},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.4885495603084564},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.483837753534317},{"id":"https://openalex.org/C120398109","wikidata":"https://www.wikidata.org/wiki/Q175751","display_name":"Quantum tunnelling","level":2,"score":0.47542622685432434},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.443251371383667},{"id":"https://openalex.org/C3017773396","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Ultra low power","level":4,"score":0.4325205087661743},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.42392098903656006},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.37322887778282166},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3400043845176697},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21209141612052917},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16430634260177612},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.14873340725898743},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.08472037315368652},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1165573.1165577","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1165573.1165577","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international symposium on Low power electronics and design  - ISLPED '06","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1661368752","https://openalex.org/W1991353080","https://openalex.org/W1992926203","https://openalex.org/W2002792980","https://openalex.org/W2003210102","https://openalex.org/W2048848279","https://openalex.org/W2123316418","https://openalex.org/W2169668461","https://openalex.org/W2787607414"],"related_works":["https://openalex.org/W1793154485","https://openalex.org/W2918058197","https://openalex.org/W1186362247","https://openalex.org/W1995720339","https://openalex.org/W2545890115","https://openalex.org/W2483800719","https://openalex.org/W2905928227","https://openalex.org/W4235745934","https://openalex.org/W2062469423","https://openalex.org/W2095078040"],"abstract_inverted_index":{"Super":[0],"cut-off":[1],"devices":[2,24],"with":[3,57],"sub-60mV/decade":[4],"subthreshold":[5,28],"swings":[6],"have":[7],"recently":[8],"been":[9],"demonstrated":[10],"and":[11],"being":[12],"extensively":[13],"studied.":[14],"This":[15],"paper":[16],"presents":[17],"a":[18,43,52],"feasibility":[19],"analysis":[20],"of":[21,48],"such":[22],"tunneling":[23],"for":[25],"ultralow":[26],"power":[27,68],"logic.":[29],"Analysis":[30],"shows":[31,62],"that":[32],"this":[33,49],"device":[34,50],"can":[35],"deliver":[36],"800X":[37],"higher":[38],"performance":[39],"(@iso-IOFF)":[40],"compared":[41,69],"to":[42,70],"MOSFET.":[44],"The":[45],"possible":[46],"use":[47],"as":[51],"sleep":[53],"transistor":[54],"in":[55,66],"conjunction":[56],"the":[58],"regular":[59],"Si":[60,71],"MOSFET":[61],"2000X":[63],"average":[64],"improvement":[65],"leakage":[67],"MOSFETs.":[72]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}