{"id":"https://openalex.org/W2117012056","doi":"https://doi.org/10.1145/1146909.1147130","title":"Power-centric design of high-speed I/Os","display_name":"Power-centric design of high-speed I/Os","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2117012056","doi":"https://doi.org/10.1145/1146909.1147130","mag":"2117012056"},"language":"en","primary_location":{"id":"doi:10.1145/1146909.1147130","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1146909.1147130","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 43rd annual conference on Design automation - DAC '06","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040337391","display_name":"Hamid Hatamkhani","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hamid Hatamkhani","raw_affiliation_strings":["UCLA, Newport Coast, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UCLA, Newport Coast, CA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074721926","display_name":"Frank Lambrecht","orcid":null},"institutions":[{"id":"https://openalex.org/I1339014352","display_name":"Rambus (United Kingdom)","ror":"https://ror.org/04z6j1174","country_code":"GB","type":"company","lineage":["https://openalex.org/I1339014352","https://openalex.org/I4210095722"]},{"id":"https://openalex.org/I4210095722","display_name":"Rambus (United States)","ror":"https://ror.org/00pn5a327","country_code":"US","type":"company","lineage":["https://openalex.org/I4210095722"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Frank Lambrecht","raw_affiliation_strings":["Rambus Inc., Los Altos, CA","Rambus Inc. (Los Altos, CA)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Rambus Inc., Los Altos, CA","institution_ids":["https://openalex.org/I4210095722"]},{"raw_affiliation_string":"Rambus Inc. (Los Altos, CA)","institution_ids":["https://openalex.org/I1339014352"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025438151","display_name":"Vladimir Stojanovi\u0107","orcid":"https://orcid.org/0000-0001-7233-6863"},"institutions":[{"id":"https://openalex.org/I4210110987","display_name":"IIT@MIT","ror":"https://ror.org/01wp8zh54","country_code":"US","type":"facility","lineage":["https://openalex.org/I30771326","https://openalex.org/I4210110987"]},{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vladimir Stojanovic","raw_affiliation_strings":["MIT, Cambridge, MA","MIT, Cambridge, Ma.#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"MIT, Cambridge, MA","institution_ids":["https://openalex.org/I4210110987"]},{"raw_affiliation_string":"MIT, Cambridge, Ma.#TAB#","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088500459","display_name":"Chih-Kong Ken Yang","orcid":"https://orcid.org/0000-0002-2993-7724"},"institutions":[{"id":"https://openalex.org/I2799798094","display_name":"UCLA Health","ror":"https://ror.org/01d88se56","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I2799798094"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chih-Kong Ken Yang","raw_affiliation_strings":["UCLA, Los Angeles, CA","UCLA, Los, Angeles, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UCLA, Los Angeles, CA","institution_ids":["https://openalex.org/I2799798094"]},{"raw_affiliation_string":"UCLA, Los, Angeles, CA","institution_ids":["https://openalex.org/I2799798094"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"867","last_page":"867"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8233286142349243},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6414788961410522},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6067847609519958},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5461217164993286},{"id":"https://openalex.org/keywords/slew-rate","display_name":"Slew rate","score":0.5146549940109253},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.4397461712360382},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4344322383403778},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4138285219669342},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.4111332893371582},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2925025224685669},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25538355112075806},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24832618236541748},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10760775208473206}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8233286142349243},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6414788961410522},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6067847609519958},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5461217164993286},{"id":"https://openalex.org/C82517063","wikidata":"https://www.wikidata.org/wiki/Q1591315","display_name":"Slew rate","level":3,"score":0.5146549940109253},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.4397461712360382},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4344322383403778},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4138285219669342},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.4111332893371582},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2925025224685669},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25538355112075806},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24832618236541748},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10760775208473206},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1146909.1147130","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1146909.1147130","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 43rd annual conference on Design automation - DAC '06","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5400000214576721,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1503188366","https://openalex.org/W2011900848","https://openalex.org/W2098520502","https://openalex.org/W2134067926","https://openalex.org/W2136138043","https://openalex.org/W2150359820","https://openalex.org/W2153677786","https://openalex.org/W2156932400","https://openalex.org/W2157264751","https://openalex.org/W2160071145"],"related_works":["https://openalex.org/W2942570004","https://openalex.org/W2162273398","https://openalex.org/W3142548232","https://openalex.org/W1975900776","https://openalex.org/W2132453911","https://openalex.org/W2059398121","https://openalex.org/W2366617252","https://openalex.org/W1990535547","https://openalex.org/W2063172373","https://openalex.org/W2082611011"],"abstract_inverted_index":{"With":[0],"increasing":[1],"aggregate":[2],"off-chip":[3],"bandwidths":[4],"exceeding":[5],"terabits/second":[6],"(Tb/s),":[7],"the":[8,69,74,99],"power":[9],"dissipation":[10],"is":[11,21,96],"a":[12,24,64,87],"serious":[13],"design":[14,17,65,75,81],"consideration.":[15],"Additionally,":[16],"of":[18,27,71,76],"I/O":[19,78],"links":[20],"constrained":[22,97],"by":[23,98],"complex":[25,48],"set":[26],"specifications":[28,45],"such":[29],"as":[30],"voltage":[31,33],"levels,":[32],"noise,":[34],"signal":[35],"deterministic":[36],"jitter,":[37,39],"random":[38],"slew":[40],"rate,":[41],"BER":[42,84],"etc.":[43],"These":[44],"lead":[46],"to":[47,58],"tradeoffs":[49,72],"for":[50],"both":[51],"circuits":[52],"and":[53],"circuit":[54],"architecture":[55],"in":[56,73],"order":[57],"minimize":[59],"power.":[60],"This":[61],"paper":[62],"presents":[63],"framework":[66,82],"that":[67,95],"enables":[68],"analysis":[70,85],"an":[77],"transmitter.":[79],"The":[80],"includes":[83],"with":[86,91],"channel":[88],"model":[89],"coupled":[90],"logic":[92],"sizing":[93],"optimization":[94],"desired":[100],"signaling":[101],"specification.":[102]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-19T07:52:34.831488","created_date":"2025-10-10T00:00:00"}
