{"id":"https://openalex.org/W2118412523","doi":"https://doi.org/10.1145/1146909.1146988","title":"Buffer insertion in large circuits with constructive solution search techniques","display_name":"Buffer insertion in large circuits with constructive solution search techniques","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2118412523","doi":"https://doi.org/10.1145/1146909.1146988","mag":"2118412523"},"language":"en","primary_location":{"id":"doi:10.1145/1146909.1146988","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1146909.1146988","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 43rd annual conference on Design automation - DAC '06","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076277366","display_name":"Mandar Waghmode","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mandar Waghmode","raw_affiliation_strings":["Texas A&M University, College Station, TX","Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas A&M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX#TAB#","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016448655","display_name":"Zhuo Li","orcid":"https://orcid.org/0000-0002-8511-9443"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhuo Li","raw_affiliation_strings":["Texas A&M University, College Station, TX","Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas A&M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX#TAB#","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078773079","display_name":"Weiping Shi","orcid":"https://orcid.org/0000-0001-9773-9255"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Weiping Shi","raw_affiliation_strings":["Texas A&M University, College Station, TX","Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas A&M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX#TAB#","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"296","last_page":"296"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7942774891853333},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6995792388916016},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6955276727676392},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6236018538475037},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.5122556090354919},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.44880324602127075},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4114944338798523},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3867150545120239},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11910432577133179}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7942774891853333},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6995792388916016},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6955276727676392},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6236018538475037},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.5122556090354919},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.44880324602127075},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4114944338798523},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3867150545120239},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11910432577133179},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1146909.1146988","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1146909.1146988","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 43rd annual conference on Design automation - DAC '06","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1967474595","https://openalex.org/W1999309262","https://openalex.org/W2012173826","https://openalex.org/W2042822039","https://openalex.org/W2048312633","https://openalex.org/W2071649027","https://openalex.org/W2095806551","https://openalex.org/W2123316553","https://openalex.org/W2136176071","https://openalex.org/W2147527731","https://openalex.org/W2151598461","https://openalex.org/W2160252016"],"related_works":["https://openalex.org/W2110968362","https://openalex.org/W4238178324","https://openalex.org/W2163776294","https://openalex.org/W3141297747","https://openalex.org/W2106889348","https://openalex.org/W4248668797","https://openalex.org/W2111485030","https://openalex.org/W4390345338","https://openalex.org/W96064250","https://openalex.org/W2884916459"],"abstract_inverted_index":{"Most":[0],"existing":[1],"buffer":[2,22,52,77,92],"insertion":[3,53,78],"algorithms,":[4],"such":[5,83],"as":[6],"van":[7],"Ginneken's":[8],"algorithm,":[9],"consider":[10],"only":[11],"individual":[12],"nets.":[13],"As":[14],"a":[15,48,75,124],"result,":[16],"these":[17],"algorithms":[18],"tend":[19],"to":[20,25,32,37,104],"over":[21],"when":[23,65],"applied":[24],"combinational":[26,55,81],"circuits,":[27],"since":[28],"it":[29],"is":[30,60,94,114],"difficult":[31],"decide":[33],"how":[34],"many":[35,68],"buffers":[36,100,143],"insert":[38],"in":[39,54,101],"each":[40],"net.":[41],"Recently,":[42],"Sze,":[43],"et":[44],"al.":[45],"[1]":[46],"proposed":[47],"path-based":[49],"algorithm":[50,59,79,97,113,137],"for":[51,62,80,123],"circuits.":[56],"However":[57],"their":[58],"inefficient":[61],"large":[63],"circuits":[64,82,132],"there":[66],"are":[67,88],"critical":[69],"paths.In":[70],"this":[71,112],"paper,":[72],"we":[73],"present":[74],"new":[76,136],"that":[84,119,134],"the":[85,91,102,106,121],"timing":[86],"requirements":[87],"met":[89],"and":[90,144],"cost":[93],"minimized.":[95],"Our":[96],"iteratively":[98],"inserts":[99],"circuit":[103,107],"improve":[105],"delay.":[108],"The":[109],"core":[110],"of":[111],"simple":[115],"but":[116],"effective":[117],"technique":[118],"guides":[120],"search":[122],"good":[125],"buffering":[126],"solution.":[127],"Experimental":[128],"results":[129],"on":[130,138],"ISCAS85":[131],"show":[133],"our":[135],"average":[139],"uses":[140],"36%":[141],"less":[142],"runs":[145],"3":[146],"times":[147],"faster":[148],"than":[149],"Sze's":[150],"algorithm.":[151]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-19T07:52:34.831488","created_date":"2025-10-10T00:00:00"}