{"id":"https://openalex.org/W2112457107","doi":"https://doi.org/10.1145/1142155.1142165","title":"Systematic dynamic memory management design methodology for reduced memory footprint","display_name":"Systematic dynamic memory management design methodology for reduced memory footprint","publication_year":2006,"publication_date":"2006-04-01","ids":{"openalex":"https://openalex.org/W2112457107","doi":"https://doi.org/10.1145/1142155.1142165","mag":"2112457107"},"language":"en","primary_location":{"id":"doi:10.1145/1142155.1142165","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1142155.1142165","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/129271","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074236306","display_name":"David Atienza","orcid":"https://orcid.org/0000-0001-9536-4947"},"institutions":[{"id":"https://openalex.org/I121748325","display_name":"Universidad Complutense de Madrid","ror":"https://ror.org/02p0gd045","country_code":"ES","type":"education","lineage":["https://openalex.org/I121748325"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"David Atienza","raw_affiliation_strings":["DACYA, Complutense University of Madrid, Madrid, Spain","DACYA/Complutense University of Madrid, Madrid, Spain#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DACYA, Complutense University of Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I121748325"]},{"raw_affiliation_string":"DACYA/Complutense University of Madrid, Madrid, Spain#TAB#","institution_ids":["https://openalex.org/I121748325"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020729196","display_name":"J.M. Mend\u0131\u0301as","orcid":"https://orcid.org/0000-0003-2142-338X"},"institutions":[{"id":"https://openalex.org/I121748325","display_name":"Universidad Complutense de Madrid","ror":"https://ror.org/02p0gd045","country_code":"ES","type":"education","lineage":["https://openalex.org/I121748325"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jose M. Mendias","raw_affiliation_strings":["DACYA, Complutense University of Madrid, Madrid, Spain","DACYA/Complutense University of Madrid, Madrid, Spain#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DACYA, Complutense University of Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I121748325"]},{"raw_affiliation_string":"DACYA/Complutense University of Madrid, Madrid, Spain#TAB#","institution_ids":["https://openalex.org/I121748325"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051970712","display_name":"Stylianos Mamagkakis","orcid":null},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Stylianos Mamagkakis","raw_affiliation_strings":["VLSI Design and Test Center, Democritus University of Thrace, Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Test Center, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["VLSI Design and Test Center, Democritus University of Thrace, Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Test Center, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033235745","display_name":"Francky Catthoor","orcid":"https://orcid.org/0000-0002-3599-8515"},"institutions":[{"id":"https://openalex.org/I196972281","display_name":"Imec the Netherlands","ror":"https://ror.org/01ezq2j76","country_code":"NL","type":"facility","lineage":["https://openalex.org/I196972281"]},{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE","NL"],"is_corresponding":false,"raw_author_name":"Francky Catthoor","raw_affiliation_strings":["DESICS Division, IMEC, Heverlee, Belgium","DESICS Division, IMEC, Heverlee, Belgium#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DESICS Division, IMEC, Heverlee, Belgium","institution_ids":["https://openalex.org/I4210114974"]},{"raw_affiliation_string":"DESICS Division, IMEC, Heverlee, Belgium#TAB#","institution_ids":["https://openalex.org/I196972281"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1232,"has_fulltext":false,"cited_by_count":38,"citation_normalized_percentile":{"value":0.78011393,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"11","issue":"2","first_page":"465","last_page":"489"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9134767055511475},{"id":"https://openalex.org/keywords/memory-footprint","display_name":"Memory footprint","score":0.7977147102355957},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.6320233345031738},{"id":"https://openalex.org/keywords/footprint","display_name":"Footprint","score":0.6080382466316223},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.584279477596283},{"id":"https://openalex.org/keywords/traverse","display_name":"Traverse","score":0.5060862898826599},{"id":"https://openalex.org/keywords/wireless-network","display_name":"Wireless network","score":0.46327731013298035},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.46001455187797546},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.4581971764564514},{"id":"https://openalex.org/keywords/construct","display_name":"Construct (python library)","score":0.41103675961494446},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.390127956867218},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.32344940304756165},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.22929856181144714},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.20010146498680115},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.17987483739852905},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14294391870498657},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13199913501739502}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9134767055511475},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.7977147102355957},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.6320233345031738},{"id":"https://openalex.org/C132943942","wikidata":"https://www.wikidata.org/wiki/Q2562511","display_name":"Footprint","level":2,"score":0.6080382466316223},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.584279477596283},{"id":"https://openalex.org/C176809094","wikidata":"https://www.wikidata.org/wiki/Q15401496","display_name":"Traverse","level":2,"score":0.5060862898826599},{"id":"https://openalex.org/C108037233","wikidata":"https://www.wikidata.org/wiki/Q11375","display_name":"Wireless network","level":3,"score":0.46327731013298035},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.46001455187797546},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.4581971764564514},{"id":"https://openalex.org/C2780801425","wikidata":"https://www.wikidata.org/wiki/Q5164392","display_name":"Construct (python library)","level":2,"score":0.41103675961494446},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.390127956867218},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.32344940304756165},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.22929856181144714},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.20010146498680115},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.17987483739852905},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14294391870498657},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13199913501739502},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1142155.1142165","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1142155.1142165","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.98.9177","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.98.9177","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://vlsi.ee.duth.gr/amdrel/papers/todaes2006atienza.pdf","raw_type":"text"},{"id":"pmh:oai:infoscience.epfl.ch:129271","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/129271","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:129271","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/129271","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4000000059604645}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1548828277","https://openalex.org/W1575790699","https://openalex.org/W1583953270","https://openalex.org/W1797879553","https://openalex.org/W1899349177","https://openalex.org/W1925341639","https://openalex.org/W1990284370","https://openalex.org/W1994115836","https://openalex.org/W1998141415","https://openalex.org/W2034674049","https://openalex.org/W2038837571","https://openalex.org/W2111919017","https://openalex.org/W2114790121","https://openalex.org/W2119542077","https://openalex.org/W2145508494","https://openalex.org/W2148746214","https://openalex.org/W2153142491","https://openalex.org/W2162435060","https://openalex.org/W2163365446","https://openalex.org/W2171872428","https://openalex.org/W2485535550","https://openalex.org/W2561675875","https://openalex.org/W3147661780","https://openalex.org/W4234259615","https://openalex.org/W4253122752"],"related_works":["https://openalex.org/W4225921128","https://openalex.org/W2130649150","https://openalex.org/W2125264433","https://openalex.org/W2013766080","https://openalex.org/W4237401226","https://openalex.org/W2244179743","https://openalex.org/W2293728877","https://openalex.org/W2112457107","https://openalex.org/W2405136079","https://openalex.org/W2112263495"],"abstract_inverted_index":{"New":[0],"portable":[1],"consumer":[2],"embedded":[3],"devices":[4],"must":[5,19],"execute":[6],"multimedia":[7,67,115],"and":[8,38,68,116,132],"wireless":[9,117],"network":[10,69,118],"applications":[11,44,70],"that":[12,57,83,137],"demand":[13],"extensive":[14],"memory":[15,94,155],"footprint.":[16],"Moreover,":[17],"they":[18],"heavily":[20],"rely":[21],"on":[22,159],"Dynamic":[23],"Memory":[24],"(DM)":[25],"due":[26],"to":[27,85,126],"the":[28,31,49,61,106,128,139,166],"unpredictability":[29],"of":[30,43,65,99,110,154,175],"input":[32],"data":[33],"(e.g.,":[34,41],"3D":[35],"streams":[36],"features)":[37],"system":[39],"behavior":[40,64],"number":[42],"running":[45],"concurrently":[46],"defined":[47],"by":[48,142,157],"user).":[50],"Within":[51],"this":[52,76],"context,":[53],"consistent":[54],"design":[55,86,108,130],"methodologies":[56],"can":[58],"tackle":[59],"efficiently":[60],"complex":[62],"DM":[63,88,111,135,140,169],"these":[66,143,173],"are":[71],"in":[72,161],"great":[73],"need.":[74],"In":[75],"article,":[77],"we":[78,121],"present":[79],"a":[80,92,123,148],"new":[81],"methodology":[82,104,151],"allows":[84],"custom":[87,134],"management":[89,112],"mechanisms":[90],"with":[91],"reduced":[93],"footprint":[95,156],"for":[96,114,172],"such":[97],"kind":[98],"dynamic":[100,145,176],"applications.":[101,119,146,177],"First,":[102],"our":[103,150],"describes":[105],"large":[107],"space":[109,131],"decisions":[113],"Then,":[120],"propose":[122],"suitable":[124],"way":[125],"traverse":[127],"aforementioned":[129],"construct":[133],"managers":[136,170],"minimize":[138],"used":[141,171],"highly":[144],"As":[147],"result,":[149],"achieves":[152],"improvements":[153],"60%":[158],"average":[160],"real":[162],"case":[163],"studies":[164],"over":[165],"current":[167],"state-of-the-art":[168],"types":[174]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
