{"id":"https://openalex.org/W2171201387","doi":"https://doi.org/10.1145/1140389.1140395","title":"Generic software pipelining at the assembly level","display_name":"Generic software pipelining at the assembly level","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2171201387","doi":"https://doi.org/10.1145/1140389.1140395","mag":"2171201387"},"language":"en","primary_location":{"id":"doi:10.1145/1140389.1140395","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1140389.1140395","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 workshop on Software and compilers for embedded systems  - SCOPES '05","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044665383","display_name":"Markus Pister","orcid":null},"institutions":[{"id":"https://openalex.org/I4210149230","display_name":"AbsInt (Germany)","ror":"https://ror.org/049gbsq65","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210149230"]},{"id":"https://openalex.org/I91712215","display_name":"Saarland University","ror":"https://ror.org/01jdpyv68","country_code":"DE","type":"education","lineage":["https://openalex.org/I91712215"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Markus Pister","raw_affiliation_strings":["Saarland University & AbsInt GmbH, Saarbr\u00fccken, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Saarland University & AbsInt GmbH, Saarbr\u00fccken, Germany","institution_ids":["https://openalex.org/I4210149230","https://openalex.org/I91712215"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031169759","display_name":"Daniel L. Kastner","orcid":"https://orcid.org/0000-0001-7188-4550"},"institutions":[{"id":"https://openalex.org/I4210149230","display_name":"AbsInt (Germany)","ror":"https://ror.org/049gbsq65","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210149230"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Daniel K\u00e4stner","raw_affiliation_strings":["AbsInt GmbH, Saarbr\u00fccken, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AbsInt GmbH, Saarbr\u00fccken, Germany","institution_ids":["https://openalex.org/I4210149230"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5281,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.71402081,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"50","last_page":"61"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.9004102945327759},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8457330465316772},{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.7512111663818359},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6789737343788147},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6271318197250366},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5870248675346375},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5387012362480164},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4933525621891022},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.48572927713394165},{"id":"https://openalex.org/keywords/instruction-scheduling","display_name":"Instruction scheduling","score":0.4296504259109497},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3544125556945801},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3169569969177246},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.30243515968322754},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.23528456687927246},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.22018030285835266},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1618533432483673},{"id":"https://openalex.org/keywords/two-level-scheduling","display_name":"Two-level scheduling","score":0.1293095052242279}],"concepts":[{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.9004102945327759},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8457330465316772},{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.7512111663818359},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6789737343788147},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6271318197250366},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5870248675346375},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5387012362480164},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4933525621891022},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.48572927713394165},{"id":"https://openalex.org/C73564150","wikidata":"https://www.wikidata.org/wiki/Q11417093","display_name":"Instruction scheduling","level":5,"score":0.4296504259109497},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3544125556945801},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3169569969177246},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30243515968322754},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.23528456687927246},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.22018030285835266},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1618533432483673},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.1293095052242279},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1140389.1140395","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1140389.1140395","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 workshop on Software and compilers for embedded systems  - SCOPES '05","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W19408225","https://openalex.org/W28761524","https://openalex.org/W90084074","https://openalex.org/W1483352170","https://openalex.org/W1501834527","https://openalex.org/W1541457918","https://openalex.org/W1553894716","https://openalex.org/W1565196699","https://openalex.org/W1568871614","https://openalex.org/W1573321520","https://openalex.org/W1594347742","https://openalex.org/W1597386284","https://openalex.org/W1686420892","https://openalex.org/W1816081266","https://openalex.org/W1859099244","https://openalex.org/W1963718362","https://openalex.org/W1967022475","https://openalex.org/W1979680516","https://openalex.org/W1991655364","https://openalex.org/W2005055779","https://openalex.org/W2010074783","https://openalex.org/W2014277916","https://openalex.org/W2063169006","https://openalex.org/W2063583051","https://openalex.org/W2065496085","https://openalex.org/W2074497238","https://openalex.org/W2076267738","https://openalex.org/W2104626020","https://openalex.org/W2111422217","https://openalex.org/W2123412205","https://openalex.org/W2135093596","https://openalex.org/W2140839406","https://openalex.org/W2154071504","https://openalex.org/W2157758640","https://openalex.org/W2296760900","https://openalex.org/W2532448721","https://openalex.org/W3143608323"],"related_works":["https://openalex.org/W2479014312","https://openalex.org/W1583465708","https://openalex.org/W128077810","https://openalex.org/W2389666628","https://openalex.org/W1602521801","https://openalex.org/W3013660549","https://openalex.org/W2389852039","https://openalex.org/W4253352037","https://openalex.org/W2063951580","https://openalex.org/W2903569085"],"abstract_inverted_index":{"Software":[0],"used":[1],"in":[2,119],"embedded":[3],"systems":[4],"is":[5,42,51,112],"subject":[6],"to":[7,62,74,106,130,161],"strict":[8],"timing":[9],"and":[10,82,115,159],"space":[11],"constraints.":[12],"The":[13,48,70,110,123],"growing":[14],"software":[15,103],"complexity":[16],"creates":[17],"an":[18,97],"urgent":[19],"need":[20],"for":[21],"fast":[22],"program":[23],"execution":[24],"under":[25],"the":[26,46,76,100,107,120,131,135,143,156],"constraint":[27],"of":[28,79,99,125,134],"very":[29],"limited":[30],"code":[31,38,77,165,169],"size.":[32],"However,":[33],"even":[34],"modern":[35],"compilers":[36,81],"produce":[37],"whose":[39],"quality":[40,78],"often":[41],"far":[43],"away":[44],"from":[45,65],"optimum.":[47],"PROPAN":[49,121],"system":[50],"a":[52,66,84,163],"postpass":[53,60,71,108,126,157],"optimization":[54],"framework":[55],"that":[56,149],"enables":[57],"high-quality":[58],"machine-dependent":[59],"optimizers":[61],"be":[63,153],"generated":[64],"concise":[67],"hardware":[68],"specification.":[69],"approach":[72],"allows":[73,160],"enhance":[75],"existing":[80,88],"offers":[83],"smooth":[85],"integration":[86],"into":[87],"development":[89],"tool":[90],"chains.":[91],"In":[92],"this":[93],"article":[94],"we":[95],"present":[96],"adaptation":[98],"modulo":[101,127,150],"scheduling":[102,128,151],"pipelining":[104],"algorithm":[105,136],"level.":[109],"implementation":[111],"fully":[113],"retargetable":[114],"has":[116],"been":[117],"incorporated":[118],"system.":[122],"differences":[124],"compared":[129],"standard":[132],"version":[133],"are":[137],"outlined.":[138],"Experimental":[139],"results":[140],"conducted":[141],"on":[142],"Philips":[144],"TriMedia":[145],"TM1000":[146],"processor":[147],"demonstrate":[148],"can":[152],"applied":[154],"at":[155],"level":[158],"achieve":[162],"significant":[164],"speedup":[166],"with":[167],"moderate":[168],"size":[170],"increase.":[171]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
