{"id":"https://openalex.org/W2012276851","doi":"https://doi.org/10.1145/1134650.1134677","title":"Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures","display_name":"Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures","publication_year":2006,"publication_date":"2006-06-14","ids":{"openalex":"https://openalex.org/W2012276851","doi":"https://doi.org/10.1145/1134650.1134677","mag":"2012276851"},"language":"en","primary_location":{"id":"doi:10.1145/1134650.1134677","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1134650.1134677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081434406","display_name":"Leipo Yan","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Leipo Yan","raw_affiliation_strings":["Nanyang Technological University, Singapore","Nanyang Technological University (Singapore)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Nanyang Technological University (Singapore)","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070475093","display_name":"Thambipillai Srikanthan","orcid":"https://orcid.org/0000-0003-3664-4345"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Thambipillai Srikanthan","raw_affiliation_strings":["Nanyang Technological University, Singapore","Nanyang Technological University (Singapore)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Nanyang Technological University (Singapore)","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103778121","display_name":"Niu Gang","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Niu Gang","raw_affiliation_strings":["Nanyang Technological University, Singapore","Nanyang Technological University (Singapore)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Nanyang Technological University (Singapore)","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"182","last_page":"188"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8220639228820801},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7846563458442688},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.6451884508132935},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6076701879501343},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5224239230155945},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49791765213012695},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4735274314880371},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4324491024017334},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37024253606796265}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8220639228820801},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7846563458442688},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.6451884508132935},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6076701879501343},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5224239230155945},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49791765213012695},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4735274314880371},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4324491024017334},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37024253606796265},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1134650.1134677","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1134650.1134677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W193742818","https://openalex.org/W1482950638","https://openalex.org/W1523051745","https://openalex.org/W1554845651","https://openalex.org/W1579143178","https://openalex.org/W1887556625","https://openalex.org/W2017906722","https://openalex.org/W2025787141","https://openalex.org/W2027066045","https://openalex.org/W2082487060","https://openalex.org/W2090068045","https://openalex.org/W2094999871","https://openalex.org/W2104121286","https://openalex.org/W2104449965","https://openalex.org/W2109876904","https://openalex.org/W2111062328","https://openalex.org/W2114266730","https://openalex.org/W2115294662","https://openalex.org/W2117285153","https://openalex.org/W2141175904","https://openalex.org/W2151820033","https://openalex.org/W2152958194","https://openalex.org/W2164614524","https://openalex.org/W2166283434","https://openalex.org/W3152232349","https://openalex.org/W4250431848","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2126857316","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W1522032972","https://openalex.org/W2113308450","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W2139962137"],"abstract_inverted_index":{"Reconfigurable":[0],"architecture":[1],"is":[2,46,61,118,159,169],"one":[3],"solution":[4],"to":[5,22,74,85,120],"the":[6,16,30,38,55,59,68,76,87,107,128,140,152,156,163,167],"increasing":[7],"computational":[8],"requirement":[9],"that":[10,67,151],"often":[11],"cannot":[12],"be":[13],"met":[14],"by":[15],"low-end":[17],"embedded":[18],"processors.":[19],"Compiling":[20],"applications":[21],"such":[23,36,96],"architectures":[24,71,110],"involves":[25],"hardware/software":[26],"partitioning.":[27],"To":[28],"partition":[29],"applications,":[31],"a":[32],"set":[33],"of":[34,54,139],"parameters,":[35],"as":[37],"hardware":[39,43],"execution":[40],"time":[41,90,131,168],"and":[42,89,130,162],"area":[44,88,129,157],"consumption,":[45],"required":[47],"for":[48,57,91,106,133,155,166],"each":[49,134],"application":[50,92,135],"block.":[51,136],"Quick":[52],"derivation":[53],"parameters":[56],"all":[58],"blocks":[60,93],"essential.":[62],"Previous":[63],"research":[64,80],"has":[65,82,143],"shown":[66],"coarse-grained":[69,108],"reconfigurable":[70,109],"are":[72],"able":[73,119],"accelerate":[75],"applications.":[77,148],"However,":[78],"no":[79],"effort":[81],"been":[83,144],"made":[84],"find":[86],"implemented":[94,111],"on":[95,112,146],"architectures.":[97],"In":[98],"this":[99],"paper":[100],"we":[101],"present":[102],"an":[103,123],"estimation":[104,116,141,153,164],"model":[105,117,142],"FPGA":[113],"platforms.":[114],"The":[115,137],"quickly":[121],"produce":[122],"area-time":[124],"graph,":[125],"which":[126],"shows":[127,150],"relationship,":[132],"accuracy":[138],"verified":[145],"real":[147],"Experiment":[149],"error":[154,165],"consumption":[158],"within":[160,170],"13%":[161],"8%.":[171]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
