{"id":"https://openalex.org/W2083396724","doi":"https://doi.org/10.1145/1132357.1132359","title":"A formal method for hardware IP design and integration under I/O and timing constraints","display_name":"A formal method for hardware IP design and integration under I/O and timing constraints","publication_year":2006,"publication_date":"2006-02-01","ids":{"openalex":"https://openalex.org/W2083396724","doi":"https://doi.org/10.1145/1132357.1132359","mag":"2083396724"},"language":"en","primary_location":{"id":"doi:10.1145/1132357.1132359","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1132357.1132359","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004215191","display_name":"Philippe Coussy","orcid":"https://orcid.org/0000-0002-7222-5271"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Philippe Coussy","raw_affiliation_strings":["UBS University, Lorient Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UBS University, Lorient Cedex, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070765151","display_name":"Emmanuel Casseau","orcid":"https://orcid.org/0000-0001-7216-749X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Emmanuel Casseau","raw_affiliation_strings":["UBS University, Lorient Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UBS University, Lorient Cedex, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063004214","display_name":"Pierre Bomel","orcid":"https://orcid.org/0000-0001-6477-6674"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pierre Bomel","raw_affiliation_strings":["UBS University, Lorient Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UBS University, Lorient Cedex, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041275081","display_name":"Adel Baganne","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Adel Baganne","raw_affiliation_strings":["UBS University, Lorient Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UBS University, Lorient Cedex, France","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080967157","display_name":"\u00c9ric Martin","orcid":"https://orcid.org/0000-0001-7040-5108"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Eric Martin","raw_affiliation_strings":["UBS University, Lorient Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UBS University, Lorient Cedex, France","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.8458,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.90397721,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"5","issue":"1","first_page":"29","last_page":"53"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7629636526107788},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.6552573442459106},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5605651140213013},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5428526401519775},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5212733745574951},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5055553913116455},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46552130579948425},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.4604187309741974},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.44746288657188416},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4255143105983734},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2936095595359802},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.1370014250278473},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10695245862007141},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07458984851837158}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7629636526107788},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.6552573442459106},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5605651140213013},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5428526401519775},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5212733745574951},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5055553913116455},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46552130579948425},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.4604187309741974},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.44746288657188416},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4255143105983734},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2936095595359802},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.1370014250278473},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10695245862007141},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07458984851837158},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1132357.1132359","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1132357.1132359","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-00077729v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00077729","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ACM Transactions on Embedded Computing Systems (TECS), 2006, vol 5, No. 1, pp.29-53. ⟨10.1145/1132357.1132359⟩","raw_type":"Journal articles"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":63,"referenced_works":["https://openalex.org/W40192171","https://openalex.org/W1498455513","https://openalex.org/W1518230963","https://openalex.org/W1526776461","https://openalex.org/W1529130237","https://openalex.org/W1532943114","https://openalex.org/W1551956513","https://openalex.org/W1567363020","https://openalex.org/W1593855808","https://openalex.org/W1737297434","https://openalex.org/W2002568004","https://openalex.org/W2010124937","https://openalex.org/W2041031309","https://openalex.org/W2070750608","https://openalex.org/W2091528902","https://openalex.org/W2092819606","https://openalex.org/W2097548931","https://openalex.org/W2100519472","https://openalex.org/W2100790831","https://openalex.org/W2108405456","https://openalex.org/W2109428261","https://openalex.org/W2112080584","https://openalex.org/W2112347743","https://openalex.org/W2114179509","https://openalex.org/W2116044284","https://openalex.org/W2116493640","https://openalex.org/W2118863037","https://openalex.org/W2121424844","https://openalex.org/W2122941519","https://openalex.org/W2123572303","https://openalex.org/W2126413277","https://openalex.org/W2128460195","https://openalex.org/W2128992370","https://openalex.org/W2129784466","https://openalex.org/W2130186880","https://openalex.org/W2130666762","https://openalex.org/W2135833569","https://openalex.org/W2139385167","https://openalex.org/W2141418663","https://openalex.org/W2141722747","https://openalex.org/W2142084809","https://openalex.org/W2143602055","https://openalex.org/W2144150772","https://openalex.org/W2146161295","https://openalex.org/W2148931284","https://openalex.org/W2149833539","https://openalex.org/W2159314954","https://openalex.org/W2161452437","https://openalex.org/W2164683163","https://openalex.org/W2166251083","https://openalex.org/W2166707097","https://openalex.org/W2527193322","https://openalex.org/W2538963240","https://openalex.org/W2603415636","https://openalex.org/W3112199566","https://openalex.org/W3143835353","https://openalex.org/W4240226712","https://openalex.org/W4243289169","https://openalex.org/W4254156796","https://openalex.org/W6640906480","https://openalex.org/W6668289193","https://openalex.org/W6678177967","https://openalex.org/W6721697195"],"related_works":["https://openalex.org/W2000444236","https://openalex.org/W2384475851","https://openalex.org/W2045155990","https://openalex.org/W4313163053","https://openalex.org/W2353602216","https://openalex.org/W2135482679","https://openalex.org/W2035070505","https://openalex.org/W1973862904","https://openalex.org/W181593118","https://openalex.org/W2077870657"],"abstract_inverted_index":{"IP":[0,30,44,57,85,103],"integration,":[1],"which":[2],"is":[3],"one":[4],"of":[5,71,93,102,113],"the":[6,75,95,111],"most":[7],"important":[8],"SoC":[9],"design":[10,23,45,120],"steps,":[11],"requires":[12],"taking":[13],"into":[14],"account":[15],"communication":[16],"and":[17,24,64],"timing":[18],"constraints.":[19,108],"In":[20,38],"that":[21,47,80],"context,":[22],"reuse":[25],"can":[26],"be":[27],"improved":[28],"using":[29],"cores":[31,104],"described":[32],"at":[33],"a":[34,69,90,117],"high":[35],"abstraction":[36],"level.":[37],"this":[39],"paper,":[40],"we":[41,97],"present":[42],"an":[43,83],"approach":[46,115],"relies":[48],"on":[49,89],"three":[50],"main":[51],"phases:":[52],"(1)":[53],"constraint":[54,58],"modeling,":[55],"(2)":[56],"analysis":[59],"steps":[60],"for":[61],"feasibility":[62],"checking,":[63],"(3)":[65],"synthesis.":[66],"We":[67,109],"propose":[68,98],"set":[70],"techniques":[72],"dedicated":[73],"to":[74,82],"digital":[76],"signal":[77],"processing":[78],"domain":[79],"lead":[81],"optimized":[84],"core":[86,119],"integration.":[87],"Based":[88],"generic":[91],"architecture":[92],"components,":[94],"method":[96],"provides":[99],"automatic":[100],"generation":[101],"designed":[105],"under":[106],"integration":[107],"show":[110],"effectiveness":[112],"our":[114],"with":[116],"DCT":[118],"case":[121],"study.":[122]},"counts_by_year":[{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}