{"id":"https://openalex.org/W2159229343","doi":"https://doi.org/10.1145/1127908.1127966","title":"Performance verification of high-performance ASICs using at-speed structural test","display_name":"Performance verification of high-performance ASICs using at-speed structural test","publication_year":2006,"publication_date":"2006-04-30","ids":{"openalex":"https://openalex.org/W2159229343","doi":"https://doi.org/10.1145/1127908.1127966","mag":"2159229343"},"language":"en","primary_location":{"id":"doi:10.1145/1127908.1127966","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1127908.1127966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 16th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111975503","display_name":"Vikram Iyengar","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vikram Iyengar","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037649191","display_name":"Mark Johnson","orcid":"https://orcid.org/0000-0001-6641-8651"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Johnson","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004969383","display_name":"Theo Anemikos","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Theo Anemikos","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074653696","display_name":"Bob Bassett","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bob Bassett","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025065808","display_name":"Mike Degregorio","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mike Degregorio","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030211426","display_name":"Rudy Farmer","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rudy Farmer","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078137581","display_name":"Gary Grise","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gary Grise","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066086417","display_name":"Phil Stevens","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Phil Stevens","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020392888","display_name":"Mark P. Taylor","orcid":"https://orcid.org/0000-0002-4158-0983"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Taylor","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011264831","display_name":"Frank Woytowich","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Frank Woytowich","raw_affiliation_strings":["IBM Microelectronics, Essex Junction, VT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Microelectronics, Essex Junction, VT","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.17963585,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"247","last_page":"252"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.779383659362793},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7094313502311707},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6328232288360596},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5168669819831848},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.4549299478530884},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.45035868883132935},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4494023025035858},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.4486149847507477},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.43766671419143677},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.40030398964881897},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.27095603942871094},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21087023615837097},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.17882701754570007},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.16446363925933838},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.08535236120223999},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.07687661051750183}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.779383659362793},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7094313502311707},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6328232288360596},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5168669819831848},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.4549299478530884},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.45035868883132935},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4494023025035858},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.4486149847507477},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.43766671419143677},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.40030398964881897},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.27095603942871094},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21087023615837097},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.17882701754570007},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.16446363925933838},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.08535236120223999},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.07687661051750183},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1127908.1127966","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1127908.1127966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 16th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.46000000834465027}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1625855991","https://openalex.org/W2102127226","https://openalex.org/W2124407221","https://openalex.org/W2127111927","https://openalex.org/W2127745713","https://openalex.org/W2128542594","https://openalex.org/W2133665055","https://openalex.org/W2134266413","https://openalex.org/W2143192260","https://openalex.org/W2146949894","https://openalex.org/W2156809047","https://openalex.org/W2167253897","https://openalex.org/W2169295286"],"related_works":["https://openalex.org/W2157212570","https://openalex.org/W2150046587","https://openalex.org/W2543176856","https://openalex.org/W2764440971","https://openalex.org/W1897203488","https://openalex.org/W2616892825","https://openalex.org/W2624668974","https://openalex.org/W1837475237","https://openalex.org/W3088373974","https://openalex.org/W2806771822"],"abstract_inverted_index":{"Performance":[0,10],"verification":[1,11,49,92,143],"is":[2,19],"becoming":[3],"critical":[4],"to":[5,27,34,109,115],"high":[6],"performance":[7,18,38,48,91,142],"ASICs":[8,16,43],"manufacturing.":[9],"ensures":[12],"that":[13,57,69],"only":[14],"those":[15],"whose":[17],"higher":[20],"than":[21],"an":[22,84],"advertized":[23],"threshold":[24],"are":[25,103,107,161],"shipped":[26],"demanding":[28],"customers.":[29],"This":[30],"provides":[31],"a":[32,134],"means":[33],"weed":[35],"out":[36],"nominal":[37],"ASICs,":[39],"and":[40,136],"also":[41],"ship":[42],"at":[44,72,94],"difference":[45],"grades.":[46],"However,":[47,98],"based":[50],"on":[51,80,125,154],"functional":[52,64,112],"test":[53,65,88,101,116,139,166],"requires":[54,66,150],"high-functionality":[55],"testers":[56,68,160],"can":[58,70,89],"supply":[59,110],"multiple":[60],"asynchronous":[61],"clocks.":[62],"Additionally,":[63],"expensive":[67],"operate":[71],"the":[73,76,81,126,155],"speed":[74],"of":[75,144],"fastest":[77],"clock":[78,113],"domain":[79],"ASIC.":[82],"As":[83],"alternative,":[85],"at-speed":[86],"structural":[87,100,138],"provide":[90],"capability":[93],"very":[95],"low":[96],"cost.":[97,167],"existing":[99],"methods":[102],"inadequate":[104],"because":[105],"they":[106,121],"unable":[108],"sufficiently-varied":[111],"sequences":[114],"complex":[117],"sequential":[118],"logic.":[119],"Moreover,":[120,158],"require":[122],"tight":[123,152],"restrictions":[124,153],"circuit":[127,156],"design.":[128,157],"In":[129],"this":[130],"paper,":[131],"we":[132],"present":[133],"scalable":[135],"flexible":[137],"method":[140,149],"for":[141],"GH-speed":[145],"ASICs.":[146],"The":[147],"proposed":[148],"no":[151],"low-cost":[159],"used,":[162],"thus":[163],"sharply":[164],"reducing":[165]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
