{"id":"https://openalex.org/W2156348954","doi":"https://doi.org/10.1145/1124713.1124723","title":"Compilers for leakage power reduction","display_name":"Compilers for leakage power reduction","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2156348954","doi":"https://doi.org/10.1145/1124713.1124723","mag":"2156348954"},"language":"en","primary_location":{"id":"doi:10.1145/1124713.1124723","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1124713.1124723","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059393275","display_name":"Yi\u2010Ping You","orcid":"https://orcid.org/0000-0002-4455-3147"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Ping You","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041823302","display_name":"Chingren Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chingren Lee","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110037994","display_name":"Jenq Kuen Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jenq Kuen Lee","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.2687,"has_fulltext":false,"cited_by_count":49,"citation_normalized_percentile":{"value":0.94547859,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"11","issue":"1","first_page":"147","last_page":"164"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8713905811309814},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7774544954299927},{"id":"https://openalex.org/keywords/instruction-scheduling","display_name":"Instruction scheduling","score":0.6228554844856262},{"id":"https://openalex.org/keywords/optimizing-compiler","display_name":"Optimizing compiler","score":0.608025074005127},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.5864111185073853},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5514678359031677},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.48982617259025574},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.438571035861969},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39045020937919617},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34731441736221313},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.26130998134613037},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.23613756895065308},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1468735635280609},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.1420479118824005},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.1342185139656067}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8713905811309814},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7774544954299927},{"id":"https://openalex.org/C73564150","wikidata":"https://www.wikidata.org/wiki/Q11417093","display_name":"Instruction scheduling","level":5,"score":0.6228554844856262},{"id":"https://openalex.org/C190902152","wikidata":"https://www.wikidata.org/wiki/Q1325106","display_name":"Optimizing compiler","level":3,"score":0.608025074005127},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.5864111185073853},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5514678359031677},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.48982617259025574},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.438571035861969},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39045020937919617},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34731441736221313},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.26130998134613037},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.23613756895065308},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1468735635280609},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.1420479118824005},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1342185139656067},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1124713.1124723","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1124713.1124723","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.468.4451","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.468.4451","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://people.cs.nctu.edu.tw/~ypyou/p147-you.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.97.5551","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.97.5551","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://pllab.cs.nthu.edu.tw/~jklee/papers/todaes.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":47,"referenced_works":["https://openalex.org/W68298618","https://openalex.org/W1491178396","https://openalex.org/W1527024979","https://openalex.org/W1581788205","https://openalex.org/W1603881466","https://openalex.org/W1633471522","https://openalex.org/W1638605615","https://openalex.org/W1970238527","https://openalex.org/W1997670204","https://openalex.org/W2014714034","https://openalex.org/W2021219395","https://openalex.org/W2032094184","https://openalex.org/W2039097694","https://openalex.org/W2047674856","https://openalex.org/W2075059680","https://openalex.org/W2095644119","https://openalex.org/W2102727118","https://openalex.org/W2103961614","https://openalex.org/W2106157873","https://openalex.org/W2110577492","https://openalex.org/W2110615063","https://openalex.org/W2110999128","https://openalex.org/W2120666737","https://openalex.org/W2123198118","https://openalex.org/W2126357937","https://openalex.org/W2131093354","https://openalex.org/W2131507936","https://openalex.org/W2134732727","https://openalex.org/W2135721541","https://openalex.org/W2139672271","https://openalex.org/W2150749964","https://openalex.org/W2155063924","https://openalex.org/W2164354609","https://openalex.org/W2165689635","https://openalex.org/W2166243422","https://openalex.org/W2169826970","https://openalex.org/W2517092547","https://openalex.org/W2533651815","https://openalex.org/W2535919346","https://openalex.org/W2615428366","https://openalex.org/W2752896430","https://openalex.org/W2912136972","https://openalex.org/W2913305800","https://openalex.org/W4237835609","https://openalex.org/W4242985528","https://openalex.org/W4243657877","https://openalex.org/W6679904606"],"related_works":["https://openalex.org/W2002505081","https://openalex.org/W2083681681","https://openalex.org/W2577630842","https://openalex.org/W1172579163","https://openalex.org/W1488300410","https://openalex.org/W2138790427","https://openalex.org/W4246454774","https://openalex.org/W2162051035","https://openalex.org/W1597127505","https://openalex.org/W3092209149"],"abstract_inverted_index":{"Power":[0],"leakage":[1,54,75,113,233],"constitutes":[2],"an":[3,87,104],"increasing":[4],"fraction":[5],"of":[6,94,131,167,184,191],"the":[7,31,92,98,112,125,146,160,165,180,216],"total":[8,161],"power":[9,33,55,95,168,234],"consumption":[10],"in":[11,39,46,61,80,154,231,235],"modern":[12],"semiconductor":[13],"technologies.":[14],"Recent":[15],"research":[16],"efforts":[17],"indicate":[18],"that":[19,70,141,226],"architectures,":[20],"compilers,":[21],"and":[22,49,182,194,206,213],"software":[23],"can":[24,142],"be":[25,143],"optimized":[26],"so":[27],"as":[28,36,58],"to":[29,44,52,73,90,110,148,179],"reduce":[30,53,111,159],"switching":[32],"(also":[34,56],"known":[35,57],"dynamic":[37],"power)":[38,60],"microprocessors.":[40,62,236],"This":[41],"has":[42],"lead":[43],"interest":[45],"using":[47],"architecture":[48,78],"compiler":[50,102,147,204,211],"optimization":[51],"static":[59],"In":[63],"this":[64],"article,":[65],"we":[66,187],"investigate":[67],"compiler-analysis":[68],"techniques":[69],"are":[71,229],"related":[72,178],"reducing":[74,232],"power.":[76,114],"The":[77,222],"model":[79],"our":[81,203,227],"design":[82],"is":[83,177],"a":[84,117,189],"system":[85],"with":[86],"instruction":[88],"set":[89,190],"support":[91],"control":[93],"gating":[96,169],"at":[97,128],"component":[99,126],"level.":[100],"Our":[101],"provides":[103],"analysis":[105,205],"framework":[106,118],"for":[107,119,123],"utilizing":[108],"instructions":[109,153],"We":[115,137,198],"present":[116],"analyzing":[120],"data":[121],"flow":[122],"estimating":[124],"activities":[127],"fixed":[129],"points":[130],"programs":[132],"whilst":[133],"considering":[134],"pipeline":[135],"architectures.":[136],"also":[138],"provide":[139],"equations":[140],"used":[144],"by":[145,201,214],"determine":[149],"whether":[150],"employing":[151],"power-gating":[152],"given":[155,174],"program":[156,175,185],"blocks":[157],"will":[158],"energy":[162,217],"requirements.":[163],"As":[164],"duration":[166],"on":[170,219],"components":[171],"when":[172],"executing":[173],"routines":[176],"number":[181],"complexity":[183],"branches,":[186],"propose":[188],"scheduling":[192,207],"policies":[193,208],"evaluate":[195],"their":[196],"effectiveness.":[197],"performed":[199],"experiments":[200],"incorporating":[202],"into":[209],"SUIF":[210],"tools":[212],"simulating":[215],"consumptions":[218],"Wattch":[220],"toolkits.":[221],"experimental":[223],"results":[224],"demonstrate":[225],"mechanisms":[228],"effective":[230]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}