{"id":"https://openalex.org/W2162929632","doi":"https://doi.org/10.1145/1120725.1121065","title":"Design of clocked circuits using UML","display_name":"Design of clocked circuits using UML","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2162929632","doi":"https://doi.org/10.1145/1120725.1121065","mag":"2162929632"},"language":"en","primary_location":{"id":"doi:10.1145/1120725.1121065","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1121065","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100565001","display_name":"Zhenxin Sun","orcid":"https://orcid.org/0009-0001-5970-8068"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Zhenxin Sun","raw_affiliation_strings":["Sch. of Comput., National Univ., Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sch. of Comput., National Univ., Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023989495","display_name":"Weng\u2010Fai Wong","orcid":"https://orcid.org/0000-0002-4281-2053"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Weng-Fai Wong","raw_affiliation_strings":["Sch. of Comput., National Univ., Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sch. of Comput., National Univ., Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086260915","display_name":"Yongxin Zhu","orcid":"https://orcid.org/0000-0002-1813-1792"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yongxin Zhu","raw_affiliation_strings":["Sch. of Comput., National Univ., Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sch. of Comput., National Univ., Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076823954","display_name":"Santhosh Kumar Pilakkat","orcid":null},"institutions":[{"id":"https://openalex.org/I3005327000","display_name":"Institute for Infocomm Research","ror":"https://ror.org/053rfa017","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I3005327000","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Santhosh Kumar Pilakkat","raw_affiliation_strings":["Institute for Infocomm Research, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Infocomm Research, Singapore","institution_ids":["https://openalex.org/I3005327000"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"901","last_page":"901"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.708103597164154},{"id":"https://openalex.org/keywords/unified-modeling-language","display_name":"Unified Modeling Language","score":0.5743238925933838},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47011271119117737},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.41011983156204224},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4078070819377899},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.36741524934768677},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3549255132675171},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3341127336025238},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.16149422526359558},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15696841478347778},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12265190482139587},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.08995562791824341}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.708103597164154},{"id":"https://openalex.org/C145644426","wikidata":"https://www.wikidata.org/wiki/Q169411","display_name":"Unified Modeling Language","level":3,"score":0.5743238925933838},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47011271119117737},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.41011983156204224},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4078070819377899},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.36741524934768677},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3549255132675171},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3341127336025238},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.16149422526359558},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15696841478347778},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12265190482139587},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.08995562791824341}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1120725.1121065","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1121065","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05","raw_type":"proceedings-article"},{"id":"pmh:oai:scholarbank.nus.edu.sg:10635/41218","is_oa":false,"landing_page_url":"http://scholarbank.nus.edu.sg/handle/10635/41218","pdf_url":null,"source":{"id":"https://openalex.org/S7407052290","display_name":"National University of Singapore","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Scopus","raw_type":"Conference Paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1485865909","https://openalex.org/W1499458427","https://openalex.org/W1717983320","https://openalex.org/W1779190374","https://openalex.org/W2018486303","https://openalex.org/W2115594860","https://openalex.org/W2119702918","https://openalex.org/W2144975461","https://openalex.org/W2158162168","https://openalex.org/W2167460474","https://openalex.org/W2235201230"],"related_works":["https://openalex.org/W2098419840","https://openalex.org/W1944377106","https://openalex.org/W1966764473","https://openalex.org/W1996820488","https://openalex.org/W2901661247","https://openalex.org/W2130565894","https://openalex.org/W4312497944","https://openalex.org/W2789349722","https://openalex.org/W4281558578","https://openalex.org/W1984298705"],"abstract_inverted_index":{"Proceedings":[0],"of":[1],"the":[2],"Asia":[3],"and":[4],"South":[5],"Pacific":[6],"Design":[7],"Automation":[8],"Conference,":[9],"ASP-DAC":[10]},"counts_by_year":[],"updated_date":"2026-07-19T07:52:34.831488","created_date":"2025-10-10T00:00:00"}
