{"id":"https://openalex.org/W2138086911","doi":"https://doi.org/10.1145/1120725.1120936","title":"On-chip accumulated jitter measurement for phase-locked loops","display_name":"On-chip accumulated jitter measurement for phase-locked loops","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2138086911","doi":"https://doi.org/10.1145/1120725.1120936","mag":"2138086911"},"language":"en","primary_location":{"id":"doi:10.1145/1120725.1120936","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1120936","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 conference on Asia South Pacific design automation  - ASP-DAC '05","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025161166","display_name":"Chih-Feng Li","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Chih-Feng Li","raw_affiliation_strings":["National Tsing-Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"National Tsing-Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078826205","display_name":"Shao-Sheng Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shao-Sheng Yang","raw_affiliation_strings":["National Tsing-Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"National Tsing-Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100885664","display_name":"Tsin\u2010Yuan Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tsin-Yuan Chang","raw_affiliation_strings":["National Tsing-Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"National Tsing-Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5025161166"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":0.7114,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.75037776,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1184","last_page":"1184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9608480930328369},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7936335802078247},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6640645265579224},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5748589038848877},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.5514942407608032},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5471906661987305},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.5032338500022888},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.48336905241012573},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.44076260924339294},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43795567750930786},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.35954201221466064},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.32770299911499023},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.16174101829528809},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10836479067802429},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09441894292831421},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0703132152557373}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9608480930328369},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7936335802078247},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6640645265579224},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5748589038848877},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.5514942407608032},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5471906661987305},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.5032338500022888},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.48336905241012573},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.44076260924339294},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43795567750930786},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.35954201221466064},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.32770299911499023},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.16174101829528809},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10836479067802429},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09441894292831421},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0703132152557373},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1120725.1120936","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1120936","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 conference on Asia South Pacific design automation  - ASP-DAC '05","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5299999713897705}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1998000686","https://openalex.org/W2111794356","https://openalex.org/W2118803820","https://openalex.org/W2123423290","https://openalex.org/W2127383597","https://openalex.org/W2130122989","https://openalex.org/W2147922245","https://openalex.org/W2151610905","https://openalex.org/W2155870661","https://openalex.org/W2162396701"],"related_works":["https://openalex.org/W2139484866","https://openalex.org/W2943997861","https://openalex.org/W2353997301","https://openalex.org/W2767220727","https://openalex.org/W2580603832","https://openalex.org/W2036880312","https://openalex.org/W2971835802","https://openalex.org/W4285329824","https://openalex.org/W2128081842","https://openalex.org/W2138086911"],"abstract_inverted_index":{"A":[0],"time-to-digital":[1],"Converter":[2],"(TDC)":[3],"circuit":[4,51],"is":[5,94],"presented":[6],"to":[7],"measure":[8],"the":[9,20,23,28,32,40,48,57,61,65,84,90],"worst-case":[10],"accumulated":[11,58],"jitters":[12,35],"over":[13],"N":[14],"periods":[15],"of":[16,64],"clock":[17],"produced":[18],"by":[19,46],"PLL.":[21],"Including":[22],"most":[24,29],"positive":[25],"jitter":[26],"and":[27,56,69,75],"negative":[30],"jitter,":[31],"worst":[33],"case":[34],"can":[36],"be":[37],"calculated":[38],"through":[39],"proposed":[41],"approach.":[42],"In":[43],"a":[44,79],"case-study,":[45],"applying":[47],"proposed.":[49],"TDC":[50],"with":[52],"4-bit":[53],"flash":[54],"ADC":[55],"period":[59],"N=8,":[60],"frequency":[62],"range":[63],"measured":[66],"signal,":[67],"resolution":[68],"linearity":[70],"error":[71,93],"are":[72],"0.7-1.4GHz,":[73],"44ps":[74],"1.25%,":[76],"respectively.":[77],"Using":[78],"0.25um":[80],"1P6M":[81],"CMOS":[82],"process,":[83],"HSPICE":[85],"simulation":[86],"result":[87],"shows":[88],"that":[89],"maximum":[91],"measurement":[92],"1":[95],"LSB":[96],"after":[97],"calibration.":[98]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
