{"id":"https://openalex.org/W2146364409","doi":"https://doi.org/10.1145/1120725.1120854","title":"High-level synthesis for DSP applications using heterogeneous functional units","display_name":"High-level synthesis for DSP applications using heterogeneous functional units","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2146364409","doi":"https://doi.org/10.1145/1120725.1120854","mag":"2146364409"},"language":"en","primary_location":{"id":"doi:10.1145/1120725.1120854","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1120854","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101639532","display_name":"Zili Shao","orcid":"https://orcid.org/0000-0002-2173-2847"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zili Shao","raw_affiliation_strings":["University of Texas at Dallas, Richardson, Texas","Dept. of Comput. Sci., Texas Univ., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Dallas, Richardson, Texas","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Texas Univ., Dallas, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005358696","display_name":"Qingfeng Zhuge","orcid":"https://orcid.org/0000-0002-1107-3470"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Qingfeng Zhuge","raw_affiliation_strings":["University of Texas at Dallas, Richardson, Texas","Dept. of Comput. Sci., Texas Univ., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Dallas, Richardson, Texas","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Texas Univ., Dallas, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101441768","display_name":"Chun Jason Xue","orcid":"https://orcid.org/0000-0002-6431-9868"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chun Xue","raw_affiliation_strings":["University of Texas at Dallas, Richardson, Texas","Dept. of Comput. Sci., Texas Univ., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Dallas, Richardson, Texas","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Texas Univ., Dallas, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100365935","display_name":"Bin Xiao","orcid":"https://orcid.org/0000-0003-4223-8220"},"institutions":[{"id":"https://openalex.org/I14243506","display_name":"Hong Kong Polytechnic University","ror":"https://ror.org/0030zas98","country_code":"HK","type":"education","lineage":["https://openalex.org/I14243506"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Bin Xiao","raw_affiliation_strings":["Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong","Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong","institution_ids":["https://openalex.org/I14243506"]},{"raw_affiliation_string":"Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong#TAB#","institution_ids":["https://openalex.org/I14243506"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077381252","display_name":"Edwin H.\u2010M. Sha","orcid":"https://orcid.org/0000-0001-5605-5631"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edwin H.-M. Sha","raw_affiliation_strings":["University of Texas at Dallas, Richardson, Texas"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Dallas, Richardson, Texas","institution_ids":["https://openalex.org/I162577319"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"302","last_page":"302"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.8175481557846069},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7660878896713257},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.6836404204368591},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6476774215698242},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6059871315956116},{"id":"https://openalex.org/keywords/cost-reduction","display_name":"Cost reduction","score":0.5277916789054871},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5000271797180176},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.4576732814311981},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4221354126930237},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3756069540977478},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3471166491508484},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.34441936016082764},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3307713270187378},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.2935076951980591},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.26034849882125854},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.17016366124153137},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08199149370193481}],"concepts":[{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.8175481557846069},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7660878896713257},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.6836404204368591},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6476774215698242},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6059871315956116},{"id":"https://openalex.org/C2778820799","wikidata":"https://www.wikidata.org/wiki/Q3454688","display_name":"Cost reduction","level":2,"score":0.5277916789054871},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5000271797180176},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.4576732814311981},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4221354126930237},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3756069540977478},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3471166491508484},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.34441936016082764},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3307713270187378},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.2935076951980591},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.26034849882125854},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.17016366124153137},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08199149370193481},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1120725.1120854","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1120854","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.101.6834","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.101.6834","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.utdallas.edu/~cxx016000/papers/aspdac05_heter.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.109.3234","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.109.3234","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.utdallas.edu/~edsha/papers/shao/ASP-DAC-05.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1606278000","https://openalex.org/W2087656024","https://openalex.org/W2102298163","https://openalex.org/W2134176207","https://openalex.org/W2158927558"],"related_works":["https://openalex.org/W1978911128","https://openalex.org/W2530146034","https://openalex.org/W2145890695","https://openalex.org/W4239976916","https://openalex.org/W2153937041","https://openalex.org/W1976754731","https://openalex.org/W4313484792","https://openalex.org/W2073831404","https://openalex.org/W2040414470","https://openalex.org/W2121053958"],"abstract_inverted_index":{"This":[0],"paper":[1],"addresses":[2],"high":[3],"level":[4],"synthesis":[5],"for":[6],"realtime":[7],"digital":[8],"signal":[9],"processing":[10],"(DSP)":[11],"architectures":[12],"using":[13],"heterogeneous":[14],"functional":[15],"units":[16],"(FUs).":[17],"For":[18],"such":[19,47,90],"special":[20],"purpose":[21],"architecture":[22],"synthesis,":[23],"an":[24,81],"important":[25],"problem":[26],"is":[27,102],"how":[28],"to":[29,35,71,83,88,124],"assign":[30,84],"a":[31,39,44,48,68,119,126,129],"proper":[32,85],"FU":[33,86],"type":[34],"each":[36],"operation":[37],"of":[38],"DSP":[40],"application":[41],"and":[42,56,128,150],"generate":[43,125,147],"schedule":[45,127],"in":[46,113],"way":[49],"that":[50,91,132,143],"all":[51],"requirements":[52],"can":[53,60,95,146],"be":[54,61,96],"met":[55],"the":[57,64,76,92,99,105,110,114,160],"total":[58,93,156],"cost":[59,94,157],"minimized.":[62],"In":[63,75,104],"paper,":[65],"we":[66,79,117],"propose":[67,80,118],"two-phase":[69],"approach":[70,145],"solve":[72],"this":[73],"problem.":[74],"first":[77,115],"phase,":[78,107,116],"algorithm":[82,123],"types":[87],"applications":[89],"minimized":[97],"while":[98],"timing":[100],"constraint":[101],"satisfied.":[103],"second":[106],"based":[108],"on":[109,155],"assignments":[111,149],"obtained":[112],"minimum":[120],"resource":[121,136],"scheduling":[122],"feasible":[130],"configuration":[131],"uses":[133],"as":[134,137],"little":[135],"possible.":[138],"The":[139],"experimental":[140],"results":[141],"show":[142],"our":[144],"high-performance":[148],"schedules":[151],"with":[152,159],"great":[153],"reduction":[154],"compared":[158],"previous":[161],"work.":[162]},"counts_by_year":[],"updated_date":"2026-07-19T07:52:34.831488","created_date":"2025-10-10T00:00:00"}
