{"id":"https://openalex.org/W2030084554","doi":"https://doi.org/10.1145/1119772.1119965","title":"A new design-for-test technique for reducing SOC test time","display_name":"A new design-for-test technique for reducing SOC test time","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2030084554","doi":"https://doi.org/10.1145/1119772.1119965","mag":"2030084554"},"language":"en","primary_location":{"id":"doi:10.1145/1119772.1119965","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119965","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009422422","display_name":"C. V. Guru Rao","orcid":"https://orcid.org/0000-0002-9210-6122"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"C. V. Guru Rao","raw_affiliation_strings":["Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046925450","display_name":"Debashish Chowdhury","orcid":"https://orcid.org/0000-0002-0536-2321"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"D. Roy Chowdhury","raw_affiliation_strings":["Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5009422422"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13021515,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"879","last_page":"879"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.6609150171279907},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6350991129875183},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5014657974243164},{"id":"https://openalex.org/keywords/test-design","display_name":"Test design","score":0.4819898009300232},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37577247619628906},{"id":"https://openalex.org/keywords/test-method","display_name":"Test method","score":0.2904939651489258},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.149892657995224},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.06745889782905579},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06471282243728638}],"concepts":[{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.6609150171279907},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6350991129875183},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5014657974243164},{"id":"https://openalex.org/C11017329","wikidata":"https://www.wikidata.org/wiki/Q7705763","display_name":"Test design","level":3,"score":0.4819898009300232},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37577247619628906},{"id":"https://openalex.org/C132519959","wikidata":"https://www.wikidata.org/wiki/Q3077373","display_name":"Test method","level":2,"score":0.2904939651489258},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.149892657995224},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.06745889782905579},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06471282243728638},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1119772.1119965","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119965","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.387.2696","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.2696","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cecs.uci.edu/~papers/compendium94-03/papers/2003/aspdac03/pdffiles/09c_5.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1516699400","https://openalex.org/W1832971077","https://openalex.org/W1895504894","https://openalex.org/W1928666065","https://openalex.org/W2104548962","https://openalex.org/W2122120296","https://openalex.org/W2148612682","https://openalex.org/W2160135614","https://openalex.org/W2169584262","https://openalex.org/W2170533364","https://openalex.org/W2503952136","https://openalex.org/W4229602994"],"related_works":["https://openalex.org/W1970368438","https://openalex.org/W2384146448","https://openalex.org/W2810041922","https://openalex.org/W2608593081","https://openalex.org/W4243083202","https://openalex.org/W1034637324","https://openalex.org/W1540608021","https://openalex.org/W2127722144","https://openalex.org/W2367642278","https://openalex.org/W2765249889"],"abstract_inverted_index":{"Abstract":[0],"\u2014":[1],"This":[2],"paper":[3],"introduces":[4],"a":[5,71],"new":[6],"design-for-test(DFT)":[7],"technique":[8],"for":[9],"system-on-chip(SOC)":[10],"designs.":[11],"It":[12],"aims":[13],"to":[14,36,55,64],"provide":[15],"the":[16,48,57,60,66,75],"test":[17,22,24,32,40,76],"designer":[18],"with":[19],"details":[20],"of":[21,51,59,74],"scheduling,":[23],"access":[25],"mechanism":[26],"(TAM)":[27],"design":[28],"and":[29,63],"an":[30,38],"integrated":[31],"strategy":[33],"in":[34,70],"order":[35],"implement":[37],"efficient":[39],"solution.":[41],"Post-synthesis":[42],"simulations":[43],"are":[44],"carried":[45],"out":[46],"on":[47],"net":[49],"lists":[50],"ISCAS\u201989":[52],"benchmark":[53],"SOCs":[54],"prove":[56],"allegiance":[58],"proposed":[61],"algorithm":[62],"realize":[65],"DFT.":[67],"Experiments":[68],"resulted":[69],"significant":[72],"reduction":[73],"time.":[77],"I.":[78]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
