{"id":"https://openalex.org/W2032882110","doi":"https://doi.org/10.1145/1119772.1119863","title":"VCore-based platform for SoC design","display_name":"VCore-based platform for SoC design","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2032882110","doi":"https://doi.org/10.1145/1119772.1119863","mag":"2032882110"},"language":"en","primary_location":{"id":"doi:10.1145/1119772.1119863","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084043790","display_name":"Yoichi Onishi","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Yoichi Onishi","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113741180","display_name":"Michiaki Muraoka","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Michiaki Muraoka","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049566689","display_name":"Makoto Utsuki","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Makoto Utsuki","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080852313","display_name":"Naoyuki Tsubaki","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Naoyuki Tsubaki","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5084043790"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4855,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.82656688,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"453","last_page":"453"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.7490907907485962},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.7381414771080017},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6459593772888184},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5846890211105347},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.557079017162323},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5537277460098267},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5444257855415344},{"id":"https://openalex.org/keywords/productivity","display_name":"Productivity","score":0.4469355046749115},{"id":"https://openalex.org/keywords/intellectual-property","display_name":"Intellectual property","score":0.4210093915462494},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21540376543998718},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12058982253074646}],"concepts":[{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.7490907907485962},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.7381414771080017},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6459593772888184},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5846890211105347},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.557079017162323},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5537277460098267},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5444257855415344},{"id":"https://openalex.org/C204983608","wikidata":"https://www.wikidata.org/wiki/Q2111958","display_name":"Productivity","level":2,"score":0.4469355046749115},{"id":"https://openalex.org/C34974158","wikidata":"https://www.wikidata.org/wiki/Q131257","display_name":"Intellectual property","level":2,"score":0.4210093915462494},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21540376543998718},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12058982253074646},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1119772.1119863","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119863","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.387.4365","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.4365","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cecs.uci.edu/~papers/compendium94-03/papers/2003/aspdac03/pdffiles/05b_3.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.4300000071525574,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1540974215","https://openalex.org/W1550131357","https://openalex.org/W1991225500","https://openalex.org/W2001379724","https://openalex.org/W2076885180","https://openalex.org/W2101361758","https://openalex.org/W2140478237","https://openalex.org/W2148740615","https://openalex.org/W2274065588"],"related_works":["https://openalex.org/W2502691491","https://openalex.org/W3142211975","https://openalex.org/W2119122672","https://openalex.org/W2130914040","https://openalex.org/W2136848245","https://openalex.org/W4292904049","https://openalex.org/W4213404769","https://openalex.org/W2104315811","https://openalex.org/W1982273910","https://openalex.org/W2142217172"],"abstract_inverted_index":{"The":[0],"reuse-based":[1],"design":[2,10,61,76],"paradigm":[3],"is":[4,36],"the":[5,9,46,74,85],"key":[6],"to":[7,38,57],"improve":[8],"productivity":[11,77],"of":[12,48],"SoCs":[13],"(System":[14],"on":[15,64],"a":[16,69],"Chip).":[17],"However,":[18],"SoC":[19,75],"designers":[20],"have":[21,32,67],"difficulty":[22],"in":[23],"using":[24,82],"conventional":[25],"IPs":[26,58],"(Intellectual":[27],"Property)":[28],"because":[29],"they":[30],"don't":[31],"enough":[33],"variability,":[34],"it":[35],"difficult":[37],"customize":[39],"them.":[40],"In":[41],"this":[42],"paper,":[43],"we":[44,66],"propose":[45],"variability":[47],"VCores":[49,54,83],"(Virtual":[50],"Cores)":[51],"and":[52,84],"show":[53,73],"are":[55],"superior":[56],"for":[59],"system-level":[60],"property.":[62],"Based":[63],"VCores,":[65],"developed":[68],"VCore-based":[70,86],"platform.":[71,87],"We":[72],"will":[78],"be":[79],"improved":[80],"by":[81]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}