{"id":"https://openalex.org/W2001379724","doi":"https://doi.org/10.1145/1119772.1119862","title":"Synthesis for SoC architecture using VCores","display_name":"Synthesis for SoC architecture using VCores","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2001379724","doi":"https://doi.org/10.1145/1119772.1119862","mag":"2001379724"},"language":"en","primary_location":{"id":"doi:10.1145/1119772.1119862","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119862","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069949152","display_name":"Hiroaki Nishi","orcid":"https://orcid.org/0000-0002-6331-2947"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Hiroaki Nishi","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113741180","display_name":"Michiaki Muraoka","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Michiaki Muraoka","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063099996","display_name":"Rafael K. Morizawa","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rafael K. Morizawa","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039687170","display_name":"Hideaki Yokota","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hideaki Yokota","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065336003","display_name":"Hideyuki Hamada","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hideyuki Hamada","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kohoku-ku, Yokohama, Japan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5069949152"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.238,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.79831618,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"446","last_page":"446"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6433818340301514},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6297343373298645},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6108366250991821},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3420259952545166},{"id":"https://openalex.org/keywords/art","display_name":"Art","score":0.06893360614776611}],"concepts":[{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6433818340301514},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6297343373298645},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6108366250991821},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3420259952545166},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.06893360614776611},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1119772.1119862","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119862","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.387.8236","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.8236","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cecs.uci.edu/~papers/compendium94-03/papers/2003/aspdac03/pdffiles/05b_2.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1496267491","https://openalex.org/W1498455513","https://openalex.org/W1540974215","https://openalex.org/W1991225500","https://openalex.org/W2012429438","https://openalex.org/W2032882110","https://openalex.org/W2054496292","https://openalex.org/W2072948403","https://openalex.org/W2076885180","https://openalex.org/W2121864144","https://openalex.org/W2132609395","https://openalex.org/W2138612658","https://openalex.org/W2164084134","https://openalex.org/W2503657378"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2350741829","https://openalex.org/W2130043461","https://openalex.org/W2530322880","https://openalex.org/W1596801655"],"abstract_inverted_index":{"In":[0],"this":[1,90],"paper,":[2],"we":[3],"propose":[4],"a":[5,28,73],"novel":[6],"architecture":[7,38,49,80,85],"synthesis":[8,77],"method":[9],"for":[10,78],"SoC":[11,23,79],"using":[12,81,89],"VCores.":[13,58],"VCores":[14,55,82],"are":[15],"reusable":[16],"and":[17,31,42,83],"configurable":[18],"high-level":[19],"descriptions.":[20],"An":[21],"initial":[22],"architecture,":[24],"which":[25],"consists":[26],"of":[27,53,66,75],"CPU,":[29],"buses,":[30],"peripherals,":[32],"is":[33,45,61],"generated":[34],"based":[35,62],"on":[36,47,63],"an":[37,84],"template.":[39],"The":[40,59],"hardware":[41,57],"software":[43,54],"tradeoff":[44],"possible":[46],"the":[48,64,67,76],"model":[50],"after":[51],"assignment":[52,60],"or":[56],"results":[65],"architecture\u2019s":[68],"performance":[69],"estimation.":[70],"We":[71],"present":[72],"prototype":[74],"level":[86],"design":[87],"experiment":[88],"prototype.":[91],"1.":[92]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}