{"id":"https://openalex.org/W2052733504","doi":"https://doi.org/10.1145/1119772.1119855","title":"Interconnect-driven floorplanning by searching alternative packings","display_name":"Interconnect-driven floorplanning by searching alternative packings","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2052733504","doi":"https://doi.org/10.1145/1119772.1119855","mag":"2052733504"},"language":"en","primary_location":{"id":"doi:10.1145/1119772.1119855","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119855","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025582832","display_name":"Chiu\u2010Wing Sham","orcid":"https://orcid.org/0000-0001-7007-6746"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Chiu-wing Sham","raw_affiliation_strings":["Chinese University of Hong Kong, Hong Kong","Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Chinese University of Hong Kong, Hong Kong","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070795253","display_name":"Evangeline F. Y. Young","orcid":"https://orcid.org/0000-0003-0623-1590"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Evangeline F. Y. Young","raw_affiliation_strings":["Chinese University of Hong Kong, Hong Kong","Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Chinese University of Hong Kong, Hong Kong","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103038285","display_name":"Hai Zhou","orcid":"https://orcid.org/0000-0003-4824-7179"},"institutions":[{"id":"https://openalex.org/I4210100400","display_name":"Northwestern University","ror":"https://ror.org/00m6w7z96","country_code":"PH","type":"education","lineage":["https://openalex.org/I4210100400"]},{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["PH","US"],"is_corresponding":false,"raw_author_name":"Hai Zhou","raw_affiliation_strings":["Northwestern University, Evanston","[Northwestern Univ., Evanston]"],"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston","institution_ids":["https://openalex.org/I4210100400"]},{"raw_affiliation_string":"[Northwestern Univ., Evanston]","institution_ids":["https://openalex.org/I111979921"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5025582832"],"corresponding_institution_ids":["https://openalex.org/I177725633"],"apc_list":null,"apc_paid":null,"fwci":0.7083,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.72270232,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"417","last_page":"417"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.9911192059516907},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7998120784759521},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7304754257202148},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.6330970525741577},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6318086385726929},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.6073812246322632},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.42245718836784363},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40118664503097534},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34552937746047974},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3117355406284332},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.29587143659591675},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2505684494972229},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2078312337398529},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0728752613067627}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.9911192059516907},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7998120784759521},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7304754257202148},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.6330970525741577},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6318086385726929},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.6073812246322632},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.42245718836784363},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40118664503097534},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34552937746047974},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3117355406284332},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.29587143659591675},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2505684494972229},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2078312337398529},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0728752613067627},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1145/1119772.1119855","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119855","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.387.4284","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.4284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cecs.uci.edu/~papers/compendium94-03/papers/2003/aspdac03/pdffiles/05a_2.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.488.9462","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.488.9462","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://users.eecs.northwestern.edu/~haizhou/publications/aspdac03.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.7.3607","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.7.3607","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cse.cuhk.edu.hk/~fyyoung/paper/aspdac03_apack.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11","score":0.800000011920929}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W133582026","https://openalex.org/W2038315433","https://openalex.org/W2097075290","https://openalex.org/W2101577681","https://openalex.org/W2109071393","https://openalex.org/W2116021187","https://openalex.org/W2178873339","https://openalex.org/W2179680236","https://openalex.org/W3149113322"],"related_works":["https://openalex.org/W2133901311","https://openalex.org/W4311031373","https://openalex.org/W2136768364","https://openalex.org/W2087871358","https://openalex.org/W2115502122","https://openalex.org/W2138401961","https://openalex.org/W2353155791","https://openalex.org/W2376028644","https://openalex.org/W2070475173","https://openalex.org/W4389672975"],"abstract_inverted_index":{"In":[0,57],"traditional":[1],"floorplanners,":[2],"area":[3,102,130],"minimization":[4],"is":[5],"an":[6],"important":[7],"issue.":[8],"Due":[9],"to":[10,64,94],"the":[11,17,34,89,92,100,120],"recent":[12],"advances":[13],"in":[14,21,33,91,129],"VLSI":[15],"technology,":[16],"number":[18],"of":[19,37,42,68,123],"transistors":[20],"a":[22,43,62,69,79,96,108,124],"design":[23],"and":[24,40,50,131],"their":[25],"switching":[26],"speeds":[27],"are":[28],"increasing":[29,35],"rapidly.":[30],"This":[31],"results":[32,113],"importance":[36],"interconnect":[38,48,66,110,121],"delay":[39],"routability":[41],"circuit.":[44],"We":[45,75],"should":[46],"consider":[47],"planning":[49,52],"buffer":[51],"as":[53,55,103],"soon":[54],"possible.":[56],"this":[58,135],"paper,":[59],"we":[60,86,116],"propose":[61],"method":[63],"reduce":[65,119],"cost":[67,122],"floorplan":[70,80,98,125],"by":[71,133],"searching":[72],"alternative":[73],"packings.":[74],"found":[76],"that":[77,115],"if":[78],"F":[81,104],"contains":[82],"some":[83],"rectangular":[84],"supermodules,":[85],"can":[87,117],"rearrange":[88],"blocks":[90],"supermodule":[93],"obtain":[95],"new":[97],"with":[99,107],"same":[101],"but":[105],"possibly":[106],"smaller":[109],"cost.":[111],"Experimental":[112],"show":[114],"always":[118],"without":[126],"any":[127],"penalty":[128],"runtime":[132],"using":[134],"method.":[136]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
