{"id":"https://openalex.org/W2074347083","doi":"https://doi.org/10.1145/1119772.1119854","title":"Fast buffer planning and congestion optimization in interconnect-driven floorplanning","display_name":"Fast buffer planning and congestion optimization in interconnect-driven floorplanning","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2074347083","doi":"https://doi.org/10.1145/1119772.1119854","mag":"2074347083"},"language":"en","primary_location":{"id":"doi:10.1145/1119772.1119854","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119854","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090477216","display_name":"Keith W. C. Wong","orcid":null},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Keith W. C. Wong","raw_affiliation_strings":["The Chinese University of Hong Kong, Shatin, New Territories, Hong Kong","Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#"],"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong, Shatin, New Territories, Hong Kong","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070795253","display_name":"Evangeline F. Y. Young","orcid":"https://orcid.org/0000-0003-0623-1590"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Evangeline F. Y. Young","raw_affiliation_strings":["The Chinese University of Hong Kong, Shatin, New Territories, Hong Kong","Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#"],"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong, Shatin, New Territories, Hong Kong","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China#TAB#","institution_ids":["https://openalex.org/I177725633"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5090477216"],"corresponding_institution_ids":["https://openalex.org/I177725633"],"apc_list":null,"apc_paid":null,"fwci":1.0624,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.7817424,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"411","last_page":"411"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.828615665435791},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7194662094116211},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6485487222671509},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.596916913986206},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5907589197158813},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.5143807530403137},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.5118162035942078},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4717453420162201},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4649941027164459},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4457618296146393},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.4272996187210083},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23676139116287231},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16342416405677795},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.15454214811325073},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1310187578201294},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09788629412651062}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.828615665435791},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7194662094116211},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6485487222671509},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.596916913986206},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5907589197158813},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.5143807530403137},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.5118162035942078},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4717453420162201},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4649941027164459},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4457618296146393},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.4272996187210083},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23676139116287231},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16342416405677795},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15454214811325073},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1310187578201294},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09788629412651062},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1119772.1119854","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119854","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.387.3877","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.3877","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cecs.uci.edu/~papers/compendium94-03/papers/2003/aspdac03/pdffiles/05a_1.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.8.7017","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.8.7017","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cse.cuhk.edu.hk/~fyyoung/paper/aspdac03_buffer.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","score":0.7599999904632568,"id":"https://metadata.un.org/sdg/11"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W184288916","https://openalex.org/W1997797456","https://openalex.org/W2008039034","https://openalex.org/W2038315433","https://openalex.org/W2048312633","https://openalex.org/W2123316553","https://openalex.org/W2128106741","https://openalex.org/W2138870185","https://openalex.org/W2143199124","https://openalex.org/W2144473140","https://openalex.org/W2151335843","https://openalex.org/W2153593246","https://openalex.org/W2159698510","https://openalex.org/W2160154532","https://openalex.org/W2178873339","https://openalex.org/W2180394037","https://openalex.org/W2752885492"],"related_works":["https://openalex.org/W1518650219","https://openalex.org/W1919516409","https://openalex.org/W4240503776","https://openalex.org/W2046102945","https://openalex.org/W2167693349","https://openalex.org/W1693171640","https://openalex.org/W2186482337","https://openalex.org/W4211105560","https://openalex.org/W2085677959","https://openalex.org/W2001838379"],"abstract_inverted_index":{"In":[0],"this":[1,35,103],"paper,":[2],"we":[3],"study":[4],"and":[5,13,54,82,105,116],"implement":[6],"a":[7],"routability-driven":[8],"floorplanner":[9,40],"with":[10,92],"congestion":[11,43],"estimation":[12,86],"buffer":[14,36,49],"block":[15],"planning.":[16],"We":[17,88],"assume":[18],"that":[19,67,107],"buffers":[20],"should":[21],"be":[22,70],"inserted":[23],"at":[24],"flexible":[25],"intervals":[26],"from":[27],"each":[28,52],"other":[29],"for":[30,51,102],"long":[31],"enough":[32],"wires.":[33],"Under":[34],"insertion":[37],"constraint,":[38],"our":[39,90,108],"will":[41],"estimate":[42],"by":[44],"computing":[45],"the":[46,60,85,99],"best":[47],"possible":[48],"locations":[50],"net":[53],"perform":[55,111],"probabilistic":[56],"analysis":[57],"based":[58],"on":[59],"solution.":[61],"Dynamic":[62],"programming":[63],"is":[64],"used":[65],"such":[66],"estimations":[68],"can":[69,110],"done":[71],"very":[72],"effectively.":[73],"Nets":[74],"are":[75,98],"topologically":[76],"grouped":[77],"to":[78,83],"consider":[79],"bus-based":[80],"routing":[81],"facilitate":[84],"process.":[87],"compare":[89],"results":[91,101],"those":[93],"in":[94,113],"paper":[95],"[16]":[96],"which":[97],"latest":[100],"problem,":[104],"show":[106],"approach":[109],"better":[112],"both":[114],"quality":[115],"runtime.":[117]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
