{"id":"https://openalex.org/W2017058004","doi":"https://doi.org/10.1145/1119772.1119813","title":"Synthesis of high performance low power PTL circuits","display_name":"Synthesis of high performance low power PTL circuits","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2017058004","doi":"https://doi.org/10.1145/1119772.1119813","mag":"2017058004"},"language":"en","primary_location":{"id":"doi:10.1145/1119772.1119813","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119813","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019043360","display_name":"Debasis Samanta","orcid":"https://orcid.org/0000-0002-6104-3771"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Debasis Samanta","raw_affiliation_strings":["Indian Institute of Technology Kharagpur, WB, India","Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Kharagpur, WB, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078944434","display_name":"M. C. Dharmadeep","orcid":null},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. C. Dharmadeep","raw_affiliation_strings":["Indian Institute of Technology Kharagpur, WB, India","Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Kharagpur, WB, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102172297","display_name":"Ajit Pal","orcid":null},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ajit Pal","raw_affiliation_strings":["Indian Institute of Technology Kharagpur, WB, India","Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Kharagpur, WB, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Indian Institute of Technology Kharagpur India","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5019043360"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":1.0624,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.77428913,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"209","last_page":"209"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5812041759490967},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4576427638530731},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.43129763007164},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3513171672821045},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15031570196151733},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.0915769636631012}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5812041759490967},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4576427638530731},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.43129763007164},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3513171672821045},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15031570196151733},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0915769636631012},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1119772.1119813","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1119772.1119813","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2003 conference on Asia South Pacific design automation  - ASPDAC","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.387.3918","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.3918","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cecs.uci.edu/~papers/compendium94-03/papers/2003/aspdac03/pdffiles/02d_4.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8899999856948853}],"awards":[],"funders":[{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1496641256","https://openalex.org/W1501277859","https://openalex.org/W1598341975","https://openalex.org/W1956463066","https://openalex.org/W2020640915","https://openalex.org/W2030029202","https://openalex.org/W2055804138","https://openalex.org/W2068422506","https://openalex.org/W2080267935","https://openalex.org/W2109840204","https://openalex.org/W2120634758","https://openalex.org/W2156028445","https://openalex.org/W3141297747","https://openalex.org/W3150081868"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2899084033","https://openalex.org/W2490684934","https://openalex.org/W2546267953","https://openalex.org/W3104703801","https://openalex.org/W620102768","https://openalex.org/W63147751","https://openalex.org/W1540071878","https://openalex.org/W4309745344","https://openalex.org/W2387122420"],"abstract_inverted_index":{"Among":[0],"the":[1,13,20,46,53,62,96,101,105,111,117,123,136,144,152],"various":[2],"CMOS":[3,18,127,154],"logic":[4],"families,":[5],"PTL":[6,37,49,57,112,146],"has":[7,42,116],"been":[8,43],"recognized":[9],"as":[10,30,120],"one":[11],"of":[12,22,40,48,52,84,122,138,143],"potential":[14],"alternatives":[15],"to":[16,36,82,95],"static":[17,126,153],"for":[19,74,135],"synthesis":[21,47,58,114],"high":[23],"performance":[24],"and":[25,90,140,148,155],"low":[26],"power":[27,92,141],"circuits,":[28,38],"Moreover,":[29],"BDDs":[31,41,65,78],"can":[32],"be":[33],"readily":[34],"mapped":[35],"use":[39],"synonymous":[44],"with":[45,151],"circuits.":[50],"Most":[51],"reported":[54],"works":[55],"on":[56,61],"are":[59],"based":[60],"Reduced":[63,76],"Ordered":[64],"(ROBDDs).":[66],"We":[67,99,130],"have":[68,131],"developed":[69,133],"a":[70],"novel":[71],"heuristic-based":[72],"technique":[73],"obtaining":[75],"Unordered":[77],"(RUBDDs),":[79],"which":[80],"leads":[81],"circuits":[83,147],"smaller":[85,91],"size":[86],"having":[87],"lesser":[88],"delay":[89,139],"consumption":[93,142],"compared":[94,149],"existing":[97,157],"results.":[98],"propose":[100],"technology":[102],"mapping":[103],"using":[104],"popular":[106],"LEAP-like":[107],"cells,":[108],"such":[109],"that":[110,121],"circuit":[113,128,159],"flow":[115],"same":[118],"flavor":[119],"standard":[124],"cell-based":[125],"synthesis.":[129],"also":[132],"models":[134],"estimation":[137],"synthesized":[145],"those":[150],"other":[156],"PTL-based":[158],"realizations.":[160]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}