{"id":"https://openalex.org/W2089016758","doi":"https://doi.org/10.1145/1117278.1117281","title":"A priori prediction of tightly clustered connections based on heuristic classification trees","display_name":"A priori prediction of tightly clustered connections based on heuristic classification trees","publication_year":2006,"publication_date":"2006-03-04","ids":{"openalex":"https://openalex.org/W2089016758","doi":"https://doi.org/10.1145/1117278.1117281","mag":"2089016758"},"language":"en","primary_location":{"id":"doi:10.1145/1117278.1117281","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1117278.1117281","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international workshop on System-level interconnect prediction","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108606543","display_name":"P. Anbalagan","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pranav Anbalagan","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA","Georgia Institute of Technology Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Georgia Institute of Technology Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101674529","display_name":"Jeffrey A. Davis","orcid":"https://orcid.org/0000-0001-8849-6933"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jeffrey A. Davis","raw_affiliation_strings":["Georgia Institute of Technology, Atlanta, GA","Georgia Institute of Technology Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Georgia Institute of Technology Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14354536,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"9","last_page":"15"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9835000038146973,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9769999980926514,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.995486855506897},{"id":"https://openalex.org/keywords/simulated-annealing","display_name":"Simulated annealing","score":0.7372981905937195},{"id":"https://openalex.org/keywords/a-priori-and-a-posteriori","display_name":"A priori and a posteriori","score":0.7243551015853882},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6525837779045105},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.5655434131622314},{"id":"https://openalex.org/keywords/heuristics","display_name":"Heuristics","score":0.5153162479400635},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4296855032444},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.323994517326355},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3206895887851715},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.29266873002052307}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.995486855506897},{"id":"https://openalex.org/C126980161","wikidata":"https://www.wikidata.org/wiki/Q863783","display_name":"Simulated annealing","level":2,"score":0.7372981905937195},{"id":"https://openalex.org/C75553542","wikidata":"https://www.wikidata.org/wiki/Q178161","display_name":"A priori and a posteriori","level":2,"score":0.7243551015853882},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6525837779045105},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.5655434131622314},{"id":"https://openalex.org/C127705205","wikidata":"https://www.wikidata.org/wiki/Q5748245","display_name":"Heuristics","level":2,"score":0.5153162479400635},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4296855032444},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.323994517326355},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3206895887851715},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.29266873002052307},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1117278.1117281","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1117278.1117281","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2006 international workshop on System-level interconnect prediction","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1970970490","https://openalex.org/W2011786775","https://openalex.org/W2015540924","https://openalex.org/W2028954821","https://openalex.org/W2047303895","https://openalex.org/W2102466856","https://openalex.org/W2140565566","https://openalex.org/W2148184392","https://openalex.org/W2155747143","https://openalex.org/W2165112989"],"related_works":["https://openalex.org/W2170314243","https://openalex.org/W2119179026","https://openalex.org/W2084470113","https://openalex.org/W3177062893","https://openalex.org/W3125143773","https://openalex.org/W2007032764","https://openalex.org/W803550684","https://openalex.org/W2483226803","https://openalex.org/W4352977312","https://openalex.org/W2041180560"],"abstract_inverted_index":{"In":[0,91],"this":[1,50,69],"paper":[2],"we":[3],"describe":[4],"a":[5,64,120],"methodology":[6,25,71],"to":[7],"predict":[8],"the":[9,15,30,33,55,87,95,99,135,140],"tightly":[10],"clustered":[11],"(shorter)":[12],"connections":[13,31,53,77,102,133],"in":[14,32,49,63,74,146],"final":[16],"optimal":[17],"placement":[18,88],"of":[19,52,57,86,98],"an":[20],"arbitrary":[21],"netlist.":[22,65],"This":[23],"new":[24,70],"is":[26,54,84,103],"based":[27,38],"on":[28,39,93,128],"classifying":[29],"netlist":[34,141],"into":[35],"several":[36],"groups":[37],"their":[40],"topological":[41],"characteristics.":[42],"The":[43,126],"most":[44],"important":[45],"characteristic":[46],"that":[47,68],"helps":[48],"classification":[51],"presence":[56],"multiple":[58],"paths":[59],"between":[60],"two":[61],"nodes":[62],"We":[66],"show":[67],"consistently":[72],"results":[73],"identifying":[75],"shorter":[76,101],"much":[78],"better":[79],"than":[80,116,134],"previous":[81],"models":[82],"and":[83,111,142],"independent":[85],"approach":[89],"used.":[90],"fact,":[92],"average,":[94],"cumulative":[96],"length":[97],"identified":[100,118],"36%":[104],"(with":[105,109,113],"Simulated":[106],"Annealing),":[107],"33%":[108,112],"Capo8.8)":[110],"Dragon)":[114],"less":[115],"those":[117],"by":[119],"current":[121],"mutual":[122],"contraction":[123],"model":[124,127],"[10].":[125],"average":[129],"identifies":[130],"27%":[131],"more":[132],"minimum":[136],"required":[137],"for":[138],"coarsening":[139],"reducing":[143],"its":[144],"size":[145],"half.":[147]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}