{"id":"https://openalex.org/W1966709241","doi":"https://doi.org/10.1145/1080334.1080340","title":"An algorithm for integrated pin assignment and buffer planning","display_name":"An algorithm for integrated pin assignment and buffer planning","publication_year":2005,"publication_date":"2005-07-01","ids":{"openalex":"https://openalex.org/W1966709241","doi":"https://doi.org/10.1145/1080334.1080340","mag":"1966709241"},"language":"en","primary_location":{"id":"doi:10.1145/1080334.1080340","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1080334.1080340","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103235503","display_name":"Hua Xiang","orcid":"https://orcid.org/0000-0001-8920-9967"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Hua Xiang","raw_affiliation_strings":["IBM T.J. Watson Research Center, Yorktown Heights, NY","IBM -- T. J. Watson Research Center, Yorktown Heights, NY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM T.J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM -- T. J. Watson Research Center, Yorktown Heights, NY","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104284394","display_name":"Xiaoping Tang","orcid":"https://orcid.org/0009-0001-2169-5337"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaoping Tang","raw_affiliation_strings":["IBM T.J. Watson Research Center, Yorktown Heights, NY","IBM -- T. J. Watson Research Center, Yorktown Heights, NY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM T.J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM -- T. J. Watson Research Center, Yorktown Heights, NY","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053378706","display_name":"Martin D. F. Wong","orcid":"https://orcid.org/0000-0001-8274-9688"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Martin D. F. Wong","raw_affiliation_strings":["University of Illinois at Urbana-Champaign, Urbana, IL","[University of Illinois at Urbana-Champaign,Urbana,IL]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois at Urbana-Champaign, Urbana, IL","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"[University of Illinois at Urbana-Champaign,Urbana,IL]","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5103235503"],"corresponding_institution_ids":["https://openalex.org/I4210114115"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09820141,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"3","first_page":"561","last_page":"572"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.8365238904953003},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8225141763687134},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.7397223711013794},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6708648204803467},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.6635352373123169},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.483975887298584},{"id":"https://openalex.org/keywords/time-complexity","display_name":"Time complexity","score":0.44432929158210754},{"id":"https://openalex.org/keywords/plan","display_name":"Plan (archaeology)","score":0.435866117477417},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.4220009446144104},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12514105439186096},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07024234533309937}],"concepts":[{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.8365238904953003},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8225141763687134},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.7397223711013794},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6708648204803467},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.6635352373123169},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.483975887298584},{"id":"https://openalex.org/C311688","wikidata":"https://www.wikidata.org/wiki/Q2393193","display_name":"Time complexity","level":2,"score":0.44432929158210754},{"id":"https://openalex.org/C2776505523","wikidata":"https://www.wikidata.org/wiki/Q4785468","display_name":"Plan (archaeology)","level":2,"score":0.435866117477417},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.4220009446144104},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12514105439186096},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07024234533309937},{"id":"https://openalex.org/C166957645","wikidata":"https://www.wikidata.org/wiki/Q23498","display_name":"Archaeology","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C95457728","wikidata":"https://www.wikidata.org/wiki/Q309","display_name":"History","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1080334.1080340","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1080334.1080340","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W184288916","https://openalex.org/W1544310393","https://openalex.org/W1556480701","https://openalex.org/W1978865105","https://openalex.org/W1990504364","https://openalex.org/W2008039034","https://openalex.org/W2075322358","https://openalex.org/W2153593246","https://openalex.org/W2159698510","https://openalex.org/W2180394037","https://openalex.org/W2338905098","https://openalex.org/W2752885492","https://openalex.org/W4214626551","https://openalex.org/W6633284831"],"related_works":["https://openalex.org/W2030816003","https://openalex.org/W4239992647","https://openalex.org/W2150013480","https://openalex.org/W1554458299","https://openalex.org/W2076325756","https://openalex.org/W81423522","https://openalex.org/W1509860481","https://openalex.org/W2488264085","https://openalex.org/W2365454866","https://openalex.org/W2029210135"],"abstract_inverted_index":{"The":[0],"buffer":[1,42,61,118],"block":[2,51,62,104],"methodology":[3],"has":[4],"become":[5],"increasingly":[6],"popular":[7],"as":[8,105],"more":[9,11],"and":[10,18,41,80,88,117,131],"buffers":[12],"are":[13],"needed":[14],"in":[15,25],"deep-submicron":[16],"design,":[17],"it":[19,109],"leads":[20],"to":[21,54],"many":[22],"challenging":[23],"problems":[24],"physical":[26],"design.":[27],"In":[28],"this":[29,97],"article,":[30],"we":[31],"present":[32],"a":[33,59,111],"polynomial-time":[34,112],"exact":[35],"algorithm":[36,98,113],"for":[37,44,76,114,120],"integrated":[38],"pin":[39,115],"assignment":[40,116],"planning":[43,119],"all":[45,55],"two-pin":[46],"nets":[47,121],"from":[48],"one":[49,103],"macro":[50,124],"(source":[52],"block)":[53],"other":[56],"blocks":[57],"of":[58,93],"given":[60],"plan,":[63],"while":[64],"minimizing":[65],"the":[66,85,91,106],"total":[67,86],"cost":[68],"\u03b1":[69,79],"\u02d9":[70,74],"W":[71,83],"+":[72],"\u03b2":[73,81],"R":[75,89],"any":[77],"positive":[78],"where":[82],"is":[84,90],"wirelength,":[87],"number":[92],"buffers.":[94],"By":[95],"applying":[96],"iteratively":[99],"(each":[100],"time,":[101],"pick":[102],"source":[107],"block),":[108],"provides":[110],"among":[122],"multiple":[123],"blocks.":[125],"Experimental":[126],"results":[127],"demonstrate":[128],"its":[129],"efficiency":[130],"effectiveness.":[132]},"counts_by_year":[],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
