{"id":"https://openalex.org/W2117520286","doi":"https://doi.org/10.1145/1077603.1077692","title":"Replacing global wires with an on-chip network","display_name":"Replacing global wires with an on-chip network","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2117520286","doi":"https://doi.org/10.1145/1077603.1077692","mag":"2117520286"},"language":"en","primary_location":{"id":"doi:10.1145/1077603.1077692","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1077603.1077692","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 international symposium on Low power electronics and design  - ISLPED '05","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111899907","display_name":"Seongmoo Heo","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Seongmoo Heo","raw_affiliation_strings":["MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA","MIT Computer Science & Artificial Intelligence Lab, Cambridge, MA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"MIT Computer Science & Artificial Intelligence Lab, Cambridge, MA, USA#TAB#","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035134864","display_name":"Krste Asanovi\u0107","orcid":"https://orcid.org/0000-0003-0754-3975"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Krste Asanovi\u0107","raw_affiliation_strings":["MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA","MIT Computer Science & Artificial Intelligence Lab, Cambridge, MA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"MIT Computer Science & Artificial Intelligence Lab, Cambridge, MA, USA#TAB#","institution_ids":["https://openalex.org/I63966007"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5111899907"],"corresponding_institution_ids":["https://openalex.org/I63966007"],"apc_list":null,"apc_paid":null,"fwci":7.6602,"has_fulltext":false,"cited_by_count":56,"citation_normalized_percentile":{"value":0.97478931,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"369","last_page":"369"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6577367782592773},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.6051429510116577},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.5940055847167969},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5405532121658325},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5386881828308105},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.5266882181167603},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.503128707408905},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.4947966933250427},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.4716968536376953},{"id":"https://openalex.org/keywords/circuit-switching","display_name":"Circuit switching","score":0.4687025249004364},{"id":"https://openalex.org/keywords/clock-network","display_name":"Clock network","score":0.4629564881324768},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.45800045132637024},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4444505572319031},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.43518972396850586},{"id":"https://openalex.org/keywords/repeater","display_name":"Repeater (horology)","score":0.41534435749053955},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39050352573394775},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2229381501674652},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17883804440498352},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.14380377531051636},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1129368245601654}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6577367782592773},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.6051429510116577},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.5940055847167969},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5405532121658325},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5386881828308105},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.5266882181167603},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.503128707408905},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.4947966933250427},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.4716968536376953},{"id":"https://openalex.org/C74294265","wikidata":"https://www.wikidata.org/wiki/Q506273","display_name":"Circuit switching","level":2,"score":0.4687025249004364},{"id":"https://openalex.org/C2778182565","wikidata":"https://www.wikidata.org/wiki/Q1752879","display_name":"Clock network","level":5,"score":0.4629564881324768},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.45800045132637024},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4444505572319031},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.43518972396850586},{"id":"https://openalex.org/C195545963","wikidata":"https://www.wikidata.org/wiki/Q1469803","display_name":"Repeater (horology)","level":3,"score":0.41534435749053955},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39050352573394775},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2229381501674652},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17883804440498352},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.14380377531051636},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1129368245601654},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1077603.1077692","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1077603.1077692","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 international symposium on Low power electronics and design  - ISLPED '05","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1556480701","https://openalex.org/W1633471522","https://openalex.org/W1993365154","https://openalex.org/W2043276498","https://openalex.org/W2051265155","https://openalex.org/W2062974672","https://openalex.org/W2099399959","https://openalex.org/W2102387714","https://openalex.org/W2103066735","https://openalex.org/W2123184444","https://openalex.org/W2140064132","https://openalex.org/W2142406425","https://openalex.org/W2144321909","https://openalex.org/W2146664966","https://openalex.org/W2151888078","https://openalex.org/W2167840018","https://openalex.org/W2169049905","https://openalex.org/W2170650195","https://openalex.org/W2171825402","https://openalex.org/W2319517590"],"related_works":["https://openalex.org/W4238242975","https://openalex.org/W2012652058","https://openalex.org/W2124316266","https://openalex.org/W2030153835","https://openalex.org/W2075400577","https://openalex.org/W2597199803","https://openalex.org/W2044764132","https://openalex.org/W2109681980","https://openalex.org/W2146211342","https://openalex.org/W280876009"],"abstract_inverted_index":{"This":[0],"paper":[1],"explores":[2],"the":[3,31,56,108,115],"power":[4,57,86,121],"implications":[5],"of":[6,44,110,130],"replacing":[7],"global":[8],"chip":[9,46],"wires":[10,112],"with":[11,48,93,126],"an":[12,41,49],"on-chip":[13,50],"network.":[14],"We":[15,39],"optimize":[16],"network":[17,53],"links":[18],"by":[19],"varying":[20],"repeater":[21],"spacing,":[22],"link":[23,111],"pipelining,":[24],"and":[25,54,76,103],"voltage":[26],"scaling,":[27],"to":[28,33,106,123],"significantly":[29],"reduce":[30,107],"energy":[32],"send":[34],"a":[35,61,70,77,91],"bit":[36],"across":[37],"chip.":[38],"develop":[40],"analytic":[42],"model":[43],"large":[45],"designs":[47,100],"two-dimensional":[51],"mesh":[52,92],"estimate":[55],"savings":[58,87,122],"possible":[59],"in":[60],"70":[62],"nm":[63],"process":[64],"for":[65,90],"two":[66],"different":[67],"design":[68],"points:":[69],"circuit-switched":[71,83],"ASIC":[72],"or":[73],"FPGA":[74],"design,":[75],"dynamic":[78],"packet-switched":[79],"tiled":[80],"architecture.":[81],"For":[82],"networks,":[84],"achievable":[85],"are":[88],"35--50%":[89],"1":[94],"mm":[95,133],"links.":[96],"The":[97],"packet":[98],"switched":[99],"use":[101],"multiplexing":[102],"signal":[104],"encoding":[105],"number":[109],"required,":[113],"but":[114],"router":[116],"overhead":[117],"limits":[118],"peak":[119],"wire":[120],"around":[124,131],"20%":[125],"optimal":[127],"tile":[128],"sizes":[129],"2":[132]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
