{"id":"https://openalex.org/W2142869170","doi":"https://doi.org/10.1145/1077603.1077664","title":"LAP","display_name":"LAP","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2142869170","doi":"https://doi.org/10.1145/1077603.1077664","mag":"2142869170"},"language":"en","primary_location":{"id":"doi:10.1145/1077603.1077664","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1077603.1077664","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 international symposium on Low power electronics and design  - ISLPED '05","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064433182","display_name":"Hassan Hassan","orcid":"https://orcid.org/0000-0002-7986-2070"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hassan Hassan","raw_affiliation_strings":["University of Waterloo, Waterloo, Ontario, Canada","Electr. & Comput. Eng. Dept., Waterloo Univ., Ont., Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Ontario, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Waterloo Univ., Ont., Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112829693","display_name":"Mohab Anis","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mohab Anis","raw_affiliation_strings":["University of Waterloo, Waterloo, Ontario, Canada","Electr. & Comput. Eng. Dept., Waterloo Univ., Ont., Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Ontario, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Waterloo Univ., Ont., Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111829312","display_name":"M.I. Elmasry","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mohamed Elmasry","raw_affiliation_strings":["University of Waterloo, Waterloo, Ontario, Canada","Electr. & Comput. Eng. Dept., Waterloo Univ., Ont., Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Ontario, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Waterloo Univ., Ont., Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.0903,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80499812,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"257","last_page":"257"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7274342179298401},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6965490579605103},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.6772122383117676},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.6415500044822693},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.6200340390205383},{"id":"https://openalex.org/keywords/idle","display_name":"Idle","score":0.5124443173408508},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49494045972824097},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4814966917037964},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4325235188007355},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.42177045345306396},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4077909588813782},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.37719738483428955},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.37260329723358154},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3279725909233093},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31581223011016846},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.22166728973388672},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.143166184425354},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11757293343544006},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09113287925720215}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7274342179298401},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6965490579605103},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.6772122383117676},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.6415500044822693},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.6200340390205383},{"id":"https://openalex.org/C16320812","wikidata":"https://www.wikidata.org/wiki/Q1812200","display_name":"Idle","level":2,"score":0.5124443173408508},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49494045972824097},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4814966917037964},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4325235188007355},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.42177045345306396},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4077909588813782},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37719738483428955},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.37260329723358154},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3279725909233093},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31581223011016846},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.22166728973388672},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.143166184425354},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11757293343544006},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09113287925720215},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1077603.1077664","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1077603.1077664","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 international symposium on Low power electronics and design  - ISLPED '05","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.800000011920929,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W1719300925","https://openalex.org/W1970278706","https://openalex.org/W2022698427","https://openalex.org/W2027006313","https://openalex.org/W2039097694","https://openalex.org/W2094806828","https://openalex.org/W2109797003","https://openalex.org/W2111756578","https://openalex.org/W2124021899","https://openalex.org/W2133762912","https://openalex.org/W2137978438","https://openalex.org/W2151731855"],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2376932109","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W1972437902","https://openalex.org/W1596801655","https://openalex.org/W2387147530","https://openalex.org/W2373011076","https://openalex.org/W2688602461"],"abstract_inverted_index":{"As":[0],"FPGAs":[1,25],"enter":[2],"the":[3,12,24,34,69],"nanometer":[4],"regime,":[5],"several":[6,75],"modifications":[7,22,65],"are":[8,66],"needed":[9],"to":[10,23,28,40,51],"reduce":[11],"increasing":[13],"leakage":[14,30,88],"power":[15,31,89],"dissipation.":[16],"Hence,":[17],"this":[18],"work":[19],"presents":[20],"some":[21],"CAD":[26],"flow":[27,71],"mitigate":[29],"dissipation":[32],"through":[33],"use":[35],"of":[36,91],"multi-threshold":[37],"CMOS":[38,80],"technologies":[39],"pack":[41],"and":[42,72],"place":[43],"logic":[44],"blocks":[45],"that":[46],"exhibit":[47],"similar":[48],"idleness":[49],"close":[50],"each":[52],"other":[53],"so":[54],"they":[55],"can":[56],"be":[57],"turned":[58],"off":[59],"during":[60],"their":[61],"idle":[62],"time.":[63],"The":[64],"integrated":[67],"into":[68],"VPR":[70],"tested":[73],"on":[74],"FPGA":[76],"benchmarks":[77],"using":[78],"a":[79],"0.13\u03bcm":[81],"dual-Vth":[82],"technology,":[83],"resulting":[84],"in":[85],"an":[86],"average":[87],"savings":[90],"at":[92],"least":[93],"20%":[94]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}
