{"id":"https://openalex.org/W2154054117","doi":"https://doi.org/10.1145/1065579.1065752","title":"Mapping statistical process variations toward circuit performance variability","display_name":"Mapping statistical process variations toward circuit performance variability","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2154054117","doi":"https://doi.org/10.1145/1065579.1065752","mag":"2154054117"},"language":"en","primary_location":{"id":"doi:10.1145/1065579.1065752","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1065579.1065752","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd annual conference on Design automation - DAC '05","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100740019","display_name":"Yu Cao","orcid":"https://orcid.org/0000-0001-6968-1180"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yu Cao","raw_affiliation_strings":["ASU, Tempe, AZ"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ASU, Tempe, AZ","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015329523","display_name":"Lawrence T. Clark","orcid":"https://orcid.org/0000-0001-7741-6512"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lawrence T. Clark","raw_affiliation_strings":["ASU, Tempe, AZ"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ASU, Tempe, AZ","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":110,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"658","last_page":"658"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.611236035823822},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.5782809257507324},{"id":"https://openalex.org/keywords/threshold-model","display_name":"Threshold model","score":0.552117109298706},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5183642506599426},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.48910003900527954},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4683508276939392},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.46652182936668396},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.46429169178009033},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.45951974391937256},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4540988504886627},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.4457208514213562},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.44290804862976074},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.43211841583251953},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.3576996326446533},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.18313804268836975},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.16242283582687378},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15125772356987},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.15089407563209534},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14182934165000916},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09607771039009094}],"concepts":[{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.611236035823822},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.5782809257507324},{"id":"https://openalex.org/C202632270","wikidata":"https://www.wikidata.org/wiki/Q7798106","display_name":"Threshold model","level":2,"score":0.552117109298706},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5183642506599426},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.48910003900527954},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4683508276939392},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.46652182936668396},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.46429169178009033},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.45951974391937256},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4540988504886627},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.4457208514213562},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.44290804862976074},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.43211841583251953},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.3576996326446533},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.18313804268836975},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.16242283582687378},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15125772356987},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.15089407563209534},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14182934165000916},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09607771039009094},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1065579.1065752","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1065579.1065752","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd annual conference on Design automation - DAC '05","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7799999713897705,"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1543524198","https://openalex.org/W1630838214","https://openalex.org/W1693570377","https://openalex.org/W2028780364","https://openalex.org/W2033443176","https://openalex.org/W2044771513","https://openalex.org/W2120116751","https://openalex.org/W2126564504","https://openalex.org/W2126580511","https://openalex.org/W2131581217","https://openalex.org/W2134067926","https://openalex.org/W2149447807","https://openalex.org/W2150526221","https://openalex.org/W2150938923","https://openalex.org/W2154941994","https://openalex.org/W2197932458","https://openalex.org/W2257517420"],"related_works":["https://openalex.org/W2100329931","https://openalex.org/W3015599398","https://openalex.org/W2034656493","https://openalex.org/W4229446324","https://openalex.org/W2158805860","https://openalex.org/W2110367374","https://openalex.org/W1804063983","https://openalex.org/W1986294008","https://openalex.org/W2134944363","https://openalex.org/W2345182073"],"abstract_inverted_index":{"A":[0],"physical":[1,62],"yet":[2],"compact":[3],"gate":[4],"delay":[5,26,28,49,65],"model":[6,40,100],"is":[7,75,87,101],"developed":[8],"integrating":[9],"short-channel":[10],"effects":[11,63],"and":[12,27,48,121],"the":[13,52,76,95,105,113],"Alpha-power":[14],"law":[15],"based":[16],"timing":[17],"model.":[18],"This":[19],"analytical":[20],"approach":[21],"accurately":[22],"predicts":[23],"both":[24],"nominal":[25],"variability":[29,50,66,80,86,127],"over":[30],"a":[31],"wide":[32],"range":[33],"of":[34,61,107,115],"bias":[35],"conditions,":[36],"including":[37],"sub-threshold.":[38],"Excellent":[39],"scalability":[41],"enables":[42],"efficient":[43],"mapping":[44],"between":[45],"process":[46,116],"variations":[47],"at":[51,81,94],"circuit":[53],"level.":[54],"Based":[55],"on":[56,64],"this":[57,99],"model,":[58],"relative":[59],"importance":[60],"has":[67],"been":[68],"identified.":[69],"While":[70],"effective":[71],"channel":[72],"length":[73],"variation":[74,93],"leading":[77],"source":[78],"for":[79],"current":[82],"90nm":[83],"node,":[84],"performance":[85],"actually":[88],"more":[89],"sensitive":[90],"to":[91,103,125],"threshold":[92],"sub-threshold":[96],"region.":[97],"Furthermore,":[98],"applied":[102],"investigate":[104],"limitation":[106],"low":[108,129],"power":[109],"design":[110],"techniques":[111,132],"in":[112],"presence":[114],"variations,":[117],"particularly":[118],"dual":[119],"Vth":[120],"L":[122],"biasing.":[123],"Due":[124],"excessive":[126],"under":[128],"VDD,":[130],"these":[131],"become":[133],"ineffective.":[134]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":10}],"updated_date":"2026-07-19T07:52:34.831488","created_date":"2025-10-10T00:00:00"}
