{"id":"https://openalex.org/W2105302023","doi":"https://doi.org/10.1145/1065579.1065751","title":"Statistical static timing analysis","display_name":"Statistical static timing analysis","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2105302023","doi":"https://doi.org/10.1145/1065579.1065751","mag":"2105302023"},"language":"en","primary_location":{"id":"doi:10.1145/1065579.1065751","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1065579.1065751","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd annual conference on Design automation  - DAC '05","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060010506","display_name":"Chirayu Amin","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chirayu S. Amin","raw_affiliation_strings":["Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113512269","display_name":"Noel Menezes","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Noel Menezes","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037460485","display_name":"Kip Killpack","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kip Killpack","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026882734","display_name":"Florentin Dartu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Florentin Dartu","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081789654","display_name":"Umakanta Choudhury","orcid":"https://orcid.org/0000-0003-3098-1877"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Umakanta Choudhury","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112619956","display_name":"Nagib Hakim","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nagib Hakim","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084980840","display_name":"Yehea Ismail","orcid":"https://orcid.org/0000-0003-3956-7533"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yehea I. Ismail","raw_affiliation_strings":["Northwestern University Evanston IL"],"affiliations":[{"raw_affiliation_string":"Northwestern University Evanston IL","institution_ids":["https://openalex.org/I111979921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5060010506"],"corresponding_institution_ids":["https://openalex.org/I111979921"],"apc_list":null,"apc_paid":null,"fwci":16.0057,"has_fulltext":false,"cited_by_count":92,"citation_normalized_percentile":{"value":0.9937233,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"652","last_page":"652"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6120026111602783},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5407166481018066},{"id":"https://openalex.org/keywords/statistical-analysis","display_name":"Statistical analysis","score":0.4188935160636902},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.2702351212501526},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13463297486305237},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.12086597084999084}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6120026111602783},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5407166481018066},{"id":"https://openalex.org/C2986587452","wikidata":"https://www.wikidata.org/wiki/Q938438","display_name":"Statistical analysis","level":2,"score":0.4188935160636902},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.2702351212501526},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13463297486305237},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.12086597084999084}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1065579.1065751","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1065579.1065751","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd annual conference on Design automation  - DAC '05","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1517661712","https://openalex.org/W1572287951","https://openalex.org/W1862469596","https://openalex.org/W1965817917","https://openalex.org/W2055388012","https://openalex.org/W2101264278","https://openalex.org/W2103323734","https://openalex.org/W2120116751","https://openalex.org/W2121334524","https://openalex.org/W2126564504","https://openalex.org/W2130601386","https://openalex.org/W2134067926","https://openalex.org/W2142599304","https://openalex.org/W2149447807","https://openalex.org/W2150055718","https://openalex.org/W2163262735","https://openalex.org/W2997538943"],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2350741829","https://openalex.org/W2130043461","https://openalex.org/W2530322880"],"abstract_inverted_index":{"With":[0],"an":[1],"increasing":[2],"trend":[3],"in":[4,26,101,106,129],"the":[5,8,14,27,45,55,86,104,108,112,116],"variation":[6],"of":[7,47,59,65,88,111,118,133],"primary":[9],"parameters":[10],"affecting":[11],"circuit":[12,92],"performance,":[13],"need":[15],"for":[16],"statistical":[17],"static":[18],"timing":[19,38,113],"analysis":[20,39],"(SSTA)":[21],"has":[22],"been":[23],"firmly":[24],"established":[25],"last":[28],"few":[29],"years.":[30],"While":[31],"it":[32],"is":[33,121],"generally":[34],"accepted":[35],"that":[36,75],"a":[37,76,82,97],"tool":[40],"should":[41],"handle":[42],"parameter":[43,89],"variations,":[44],"benefits":[46],"advanced":[48],"SSTA":[49,78],"algorithms":[50],"are":[51],"still":[52],"questioned":[53],"by":[54],"designer":[56],"community":[57],"because":[58],"their":[60],"significant":[61],"impact":[62],"on":[63,91],"complexity":[64],"STA":[66],"flows.":[67],"In":[68],"this":[69],"paper,":[70],"we":[71],"present":[72],"convincing":[73],"evidence":[74],"path-based":[77],"approach":[79],"implemented":[80,100],"as":[81],"post-processing":[83],"step":[84],"captures":[85],"effect":[87],"variations":[90],"performance":[93],"fairly":[94],"accurately.":[95],"On":[96],"microprocessor":[98],"block":[99],"90nm":[102],"technology,":[103],"error":[105],"estimating":[107],"standard":[109],"deviation":[110],"margin":[114],"at":[115,122],"inputs":[117],"sequential":[119],"elements":[120],"most":[123],"0.066":[124],"FO4":[125],"delays,":[126],"which":[127],"translates":[128],"to":[130],"only":[131],"0.31%":[132],"worst":[134],"case":[135],"path":[136],"delay.":[137]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}