{"id":"https://openalex.org/W2104904736","doi":"https://doi.org/10.1145/1065579.1065653","title":"Keeping hot chips cool","display_name":"Keeping hot chips cool","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2104904736","doi":"https://doi.org/10.1145/1065579.1065653","mag":"2104904736"},"language":"en","primary_location":{"id":"doi:10.1145/1065579.1065653","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1065579.1065653","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd annual conference on Design automation  - DAC '05","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045722906","display_name":"Ruchir Puri","orcid":"https://orcid.org/0009-0006-8803-7079"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ruchir Puri","raw_affiliation_strings":["IBM T.J. Watson Research Center, Yorktown Heights, NY","IBM -- T. J. Watson Research Center, Yorktown Heights, NY"],"affiliations":[{"raw_affiliation_string":"IBM T.J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM -- T. J. Watson Research Center, Yorktown Heights, NY","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082318082","display_name":"Leon Stok","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Leon Stok","raw_affiliation_strings":["IBM, Somers, NY","IBM, Somers, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM, Somers, NY","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"IBM, Somers, NY#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101463763","display_name":"Subhrajit Bhattacharya","orcid":"https://orcid.org/0000-0001-9139-054X"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subhrajit Bhattacharya","raw_affiliation_strings":["IBM T.J. Watson Research Center, Yorktown Heights, NY","IBM -- T. J. Watson Research Center, Yorktown Heights, NY"],"affiliations":[{"raw_affiliation_string":"IBM T.J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM -- T. J. Watson Research Center, Yorktown Heights, NY","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5045722906"],"corresponding_institution_ids":["https://openalex.org/I4210114115"],"apc_list":null,"apc_paid":null,"fwci":3.9125,"has_fulltext":false,"cited_by_count":45,"citation_normalized_percentile":{"value":0.93477029,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":93,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"285","last_page":"285"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.7356948852539062},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6348904371261597},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.6268267035484314},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5776470899581909},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5755980014801025},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5303441286087036},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5140300989151001},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5103816390037537},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.47176507115364075},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4635455012321472},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.45463863015174866},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.44713258743286133},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4445390999317169},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4433589279651642},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44288310408592224},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.43310225009918213},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3107869327068329},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.3025228977203369},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3000026345252991},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.24891218543052673},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.20281928777694702},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09497615694999695},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.09241858124732971}],"concepts":[{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.7356948852539062},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6348904371261597},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.6268267035484314},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5776470899581909},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5755980014801025},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5303441286087036},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5140300989151001},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5103816390037537},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.47176507115364075},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4635455012321472},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.45463863015174866},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.44713258743286133},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4445390999317169},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4433589279651642},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44288310408592224},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.43310225009918213},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3107869327068329},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.3025228977203369},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3000026345252991},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.24891218543052673},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.20281928777694702},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09497615694999695},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.09241858124732971},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1065579.1065653","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1065579.1065653","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 42nd annual conference on Design automation  - DAC '05","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1967419401","https://openalex.org/W2098143668","https://openalex.org/W2106319297","https://openalex.org/W2109846948","https://openalex.org/W2126416778","https://openalex.org/W2126700722","https://openalex.org/W2137589342"],"related_works":["https://openalex.org/W2938543345","https://openalex.org/W2560570484","https://openalex.org/W2113774150","https://openalex.org/W2157682258","https://openalex.org/W2581156470","https://openalex.org/W2147835582","https://openalex.org/W2090602390","https://openalex.org/W2143114492","https://openalex.org/W3111144840","https://openalex.org/W4231605318"],"abstract_inverted_index":{"With":[0],"90nm":[1],"CMOS":[2],"in":[3,8,38,95],"production":[4],"and":[5,51,68,75],"65nm":[6],"testing":[7],"progress,":[9],"power":[10,37,57,62,88,93],"has":[11],"been":[12],"pushed":[13],"to":[14,29,64,84],"the":[15,49],"forefront":[16],"of":[17,102,108],"design":[18,44,50],"metrics.":[19],"This":[20],"paper":[21],"will":[22,47,89,112],"outline":[23],"practical":[24],"techniques":[25,59,83,111],"that":[26],"are":[27],"used":[28],"reduce":[30,65,85],"both":[31],"leakage":[32,73],"as":[33,35,92],"well":[34],"active":[36],"a":[39,99],"standard-cell":[40],"library":[41],"based":[42,79],"high-performance":[43],"flow.":[45],"We":[46],"discuss":[48],"cost":[52],"issues":[53],"for":[54,72,98],"using":[55],"different":[56],"saving":[58],"such":[60],"as:":[61],"gating":[63],"leakage,":[66],"multiple":[67,76],"hybrid":[69],"threshold":[70],"libraries":[71],"reduction":[74],"supply":[77],"voltage":[78],"design.":[80],"In":[81],"addition":[82],"clock":[86],"tree":[87],"be":[90,114],"presented":[91],"consumed":[94],"clocks":[96],"accounts":[97],"significant":[100],"portion":[101],"total":[103],"chip":[104],"power.":[105],"Practical":[106],"aspects":[107],"implementing":[109],"these":[110],"also":[113],"discussed.":[115]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":7},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
