{"id":"https://openalex.org/W1972225499","doi":"https://doi.org/10.1145/1059876.1059877","title":"Scheduling and optimal register placement for synchronous circuits derived using software pipelining techniques","display_name":"Scheduling and optimal register placement for synchronous circuits derived using software pipelining techniques","publication_year":2005,"publication_date":"2005-04-01","ids":{"openalex":"https://openalex.org/W1972225499","doi":"https://doi.org/10.1145/1059876.1059877","mag":"1972225499"},"language":"en","primary_location":{"id":"doi:10.1145/1059876.1059877","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1059876.1059877","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034249267","display_name":"Noureddine Chabini","orcid":null},"institutions":[{"id":"https://openalex.org/I51768193","display_name":"Royal Military College of Canada","ror":"https://ror.org/04yr71909","country_code":"CA","type":"education","lineage":["https://openalex.org/I51768193"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Noureddine Chabini","raw_affiliation_strings":["Royal Military College of Canada, Canada","Royal Military College of Canada, Canada#TAB#"],"affiliations":[{"raw_affiliation_string":"Royal Military College of Canada, Canada","institution_ids":["https://openalex.org/I51768193"]},{"raw_affiliation_string":"Royal Military College of Canada, Canada#TAB#","institution_ids":["https://openalex.org/I51768193"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048679498","display_name":"E.M. Aboulhamid","orcid":null},"institutions":[{"id":"https://openalex.org/I70931966","display_name":"Universit\u00e9 de Montr\u00e9al","ror":"https://ror.org/0161xgx34","country_code":"CA","type":"education","lineage":["https://openalex.org/I70931966"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"El Mostapha Aboulhamid","raw_affiliation_strings":["Universit\u00e9 de Montr\u00e9al, Canada","Universite de Montreal (Canada)"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 de Montr\u00e9al, Canada","institution_ids":["https://openalex.org/I70931966"]},{"raw_affiliation_string":"Universite de Montreal (Canada)","institution_ids":["https://openalex.org/I70931966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042528645","display_name":"Isma\u00efl Chabini","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Isma\u00efl Chabini","raw_affiliation_strings":["Massachusetts Institute of Technology, MA, USA","[Massachusetts Institute of Technology, MA, USA]"],"affiliations":[{"raw_affiliation_string":"Massachusetts Institute of Technology, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"[Massachusetts Institute of Technology, MA, USA]","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038488044","display_name":"Yvon Savaria","orcid":"https://orcid.org/0000-0002-3404-9959"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Yvon Savaria","raw_affiliation_strings":["\u00e9cole Polytechnique de Montr\u00e9al, QC, Canada"],"affiliations":[{"raw_affiliation_string":"\u00e9cole Polytechnique de Montr\u00e9al, QC, Canada","institution_ids":["https://openalex.org/I45683168"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5034249267"],"corresponding_institution_ids":["https://openalex.org/I51768193"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.10280947,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"2","first_page":"187","last_page":"204"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.857654869556427},{"id":"https://openalex.org/keywords/retiming","display_name":"Retiming","score":0.8454751968383789},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.7405391335487366},{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.723410964012146},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5497649908065796},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5172291994094849},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5051727890968323},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.49820661544799805},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.48280513286590576},{"id":"https://openalex.org/keywords/time-complexity","display_name":"Time complexity","score":0.477383553981781},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.47035646438598633},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.4523296654224396},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3983936309814453},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.3642019033432007},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.3437017798423767},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.20517659187316895},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13631516695022583},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.1071721613407135}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.857654869556427},{"id":"https://openalex.org/C41112130","wikidata":"https://www.wikidata.org/wiki/Q2146175","display_name":"Retiming","level":2,"score":0.8454751968383789},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.7405391335487366},{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.723410964012146},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5497649908065796},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5172291994094849},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5051727890968323},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.49820661544799805},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.48280513286590576},{"id":"https://openalex.org/C311688","wikidata":"https://www.wikidata.org/wiki/Q2393193","display_name":"Time complexity","level":2,"score":0.477383553981781},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.47035646438598633},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.4523296654224396},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3983936309814453},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.3642019033432007},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.3437017798423767},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.20517659187316895},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13631516695022583},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.1071721613407135},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1059876.1059877","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1059876.1059877","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},{"id":"pmh:oai:publications.polymtl.ca:24315","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/24315/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article de revue"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W1537992819","https://openalex.org/W1977545325","https://openalex.org/W1988533326","https://openalex.org/W1990011744","https://openalex.org/W2001274023","https://openalex.org/W2011778848","https://openalex.org/W2033040247","https://openalex.org/W2066408410","https://openalex.org/W2085887317","https://openalex.org/W2087656024","https://openalex.org/W2088808707","https://openalex.org/W2090285015","https://openalex.org/W2100201046","https://openalex.org/W2102159907","https://openalex.org/W2112576953","https://openalex.org/W2115239728","https://openalex.org/W2120390801","https://openalex.org/W2124062015","https://openalex.org/W2125690626","https://openalex.org/W2128023969","https://openalex.org/W2144590469","https://openalex.org/W2149417654","https://openalex.org/W2157398460","https://openalex.org/W2165108765","https://openalex.org/W2169417961","https://openalex.org/W2171325586","https://openalex.org/W2296760900","https://openalex.org/W2611147814","https://openalex.org/W2752885492","https://openalex.org/W2913252637","https://openalex.org/W3150437273","https://openalex.org/W4205241946","https://openalex.org/W4231104284","https://openalex.org/W4235935333","https://openalex.org/W4254609273","https://openalex.org/W4285719527","https://openalex.org/W6600175266"],"related_works":["https://openalex.org/W2155325307","https://openalex.org/W1537992819","https://openalex.org/W2171325586","https://openalex.org/W1608654372","https://openalex.org/W4242540550","https://openalex.org/W1972225499","https://openalex.org/W2126845391","https://openalex.org/W2158055150","https://openalex.org/W2166935368","https://openalex.org/W2123216308"],"abstract_inverted_index":{"Data":[0],"dependency":[1],"constraints":[2],"constitute":[3],"a":[4,65,178,192],"lower":[5],"bound":[6],"P":[7,32],"on":[8,23],"the":[9,54,70,79,84,100,134,149,157,167,170,174,200,209,220,223,231,245,249,255,261],"minimal":[10,262],"clock":[11,30,85,215],"period":[12,31],"of":[13,69,127,136,152,222,230,233,257,264],"single-phase":[14],"clocked":[15,26],"sequential":[16,27],"circuits.":[17,205],"In":[18,129],"contrast":[19],"to":[20,78,87,93,117,123,138,147,184,195,199,254,259],"methods":[21,112],"based":[22],"basic":[24],"retiming,":[25],"circuits":[28,42],"with":[29,90,108],"can":[33,43,50,212,235],"always":[34],"be":[35,44,51,236],"obtained":[36,237],"using":[37],"software":[38],"pipelining":[39],"techniques.":[40],"Such":[41],"derived":[45],"by":[46],"any":[47],"method":[48],"that":[49,156,208,227],"framed":[52],"in":[53,99,145,161,173,266],"following":[55],"four-step":[56],"process:":[57],"Step":[58,62,73,81,109,267],"1,":[59],"determine":[60,196],"P;":[61],"2,":[63],"compute":[64],"valid":[66],"periodic":[67],"schedule":[68,246],"computational":[71],"elements;":[72],"3,":[74],"place":[75,119,260],"registers":[76,120,234,265],"back":[77],"circuit;":[80],"4,":[82],"assign":[83],"signals":[86],"control":[88],"registers.Methods":[89],"polynomial":[91],"run-time":[92],"implement":[94,103,140],"this":[95,130,188],"process":[96],"are":[97],"proposed":[98,210,250],"literature.":[101],"They":[102],"these":[104],"steps":[105],"sequentially,":[106],"starting":[107],"1.":[110],"These":[111],"do":[113],"not":[114,242],"know":[115],"how":[116,137,258],"optimally":[118],"which":[121],"leads":[122],"an":[124],"unnecessary":[125],"number":[126,151,232,263],"registers.":[128,153],"article,":[131],"we":[132,190],"address":[133],"problem":[135,158,168,201,256],"simultaneously":[139],"Steps":[141],"2":[142],"and":[143,176,225],"3":[144],"order":[146],"minimize":[148],"total":[150],"We":[154,165,206],"conjecture":[155],"is":[159,241,247],"NP-hard":[160],"its":[162],"general":[163,204],"form.":[164],"formulate":[166],"for":[169,202],"first":[171],"time":[172],"literature,":[175],"devise":[177],"Mixed":[179],"Integer":[180],"Linear":[181],"Program":[182],"(MILP)":[183],"solve":[185],"it.":[186],"From":[187],"MILP,":[189],"derive":[191],"linear":[193],"program":[194],"approximate":[197],"solutions":[198,253],"large":[203],"show":[207,226],"approach":[211,224,251],"handle":[213],"nonzero":[214],"skew.":[216],"Experimental":[217],"results":[218],"confirm":[219],"effectiveness":[221],"significant":[228],"reductions":[229],"although":[238],"register":[239],"sharing":[240],"used.":[243],"When":[244],"given,":[248],"provides":[252],"3.":[268]},"counts_by_year":[],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}