{"id":"https://openalex.org/W2161819074","doi":"https://doi.org/10.1145/1057661.1057734","title":"A complete methodology for an accurate static noise analysis","display_name":"A complete methodology for an accurate static noise analysis","publication_year":2005,"publication_date":"2005-04-17","ids":{"openalex":"https://openalex.org/W2161819074","doi":"https://doi.org/10.1145/1057661.1057734","mag":"2161819074"},"language":"en","primary_location":{"id":"doi:10.1145/1057661.1057734","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057734","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077487670","display_name":"Cristiano Forzan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Cristiano Forzan","raw_affiliation_strings":["STMicroelectronics, Bologna, Italy"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Bologna, Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065985032","display_name":"Davide Pandini","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Pandini","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5077487670"],"corresponding_institution_ids":["https://openalex.org/I4210154781"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.21556534,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"302","last_page":"307"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/glitch","display_name":"Glitch","score":0.8252823352813721},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.727856457233429},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.6681989431381226},{"id":"https://openalex.org/keywords/superposition-principle","display_name":"Superposition principle","score":0.5982954502105713},{"id":"https://openalex.org/keywords/noise-measurement","display_name":"Noise measurement","score":0.548524022102356},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5379124283790588},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5151418447494507},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.49502724409103394},{"id":"https://openalex.org/keywords/noise-reduction","display_name":"Noise reduction","score":0.19869264960289001},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17315545678138733},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1309426724910736},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12699607014656067},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11938998103141785}],"concepts":[{"id":"https://openalex.org/C191287063","wikidata":"https://www.wikidata.org/wiki/Q543281","display_name":"Glitch","level":3,"score":0.8252823352813721},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.727856457233429},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.6681989431381226},{"id":"https://openalex.org/C27753989","wikidata":"https://www.wikidata.org/wiki/Q284885","display_name":"Superposition principle","level":2,"score":0.5982954502105713},{"id":"https://openalex.org/C29265498","wikidata":"https://www.wikidata.org/wiki/Q7047719","display_name":"Noise measurement","level":3,"score":0.548524022102356},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5379124283790588},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5151418447494507},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.49502724409103394},{"id":"https://openalex.org/C163294075","wikidata":"https://www.wikidata.org/wiki/Q581861","display_name":"Noise reduction","level":2,"score":0.19869264960289001},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17315545678138733},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1309426724910736},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12699607014656067},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11938998103141785},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1057661.1057734","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057734","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1555121108","https://openalex.org/W1585233173","https://openalex.org/W2099744220","https://openalex.org/W2099766936","https://openalex.org/W2102463881","https://openalex.org/W2128919817","https://openalex.org/W2135742364","https://openalex.org/W2136728320","https://openalex.org/W2158118249","https://openalex.org/W2163626738","https://openalex.org/W2171493164","https://openalex.org/W3142963927"],"related_works":["https://openalex.org/W2140328632","https://openalex.org/W2541225405","https://openalex.org/W2149184458","https://openalex.org/W4316660008","https://openalex.org/W2373956461","https://openalex.org/W1482101251","https://openalex.org/W1505247109","https://openalex.org/W2898595008","https://openalex.org/W2910846249","https://openalex.org/W2154317586"],"abstract_inverted_index":{"In":[0],"signal":[1],"integrity":[2],"analysis,":[3],"the":[4,15,37,53,56,60,77,100,111,118],"joint":[5],"effect":[6],"of":[7,14,55,99,120],"propagated":[8,101],"noise":[9,16,39,61,92,104,129],"through":[10,26],"library":[11],"cells,":[12],"and":[13,44,66,74,102,116],"injected":[17],"on":[18,41,59,96],"a":[19,48,67],"quiet":[20],"net":[21],"by":[22],"neighboring":[23],"switching":[24],"nets":[25],"coupling":[27],"capacitances,":[28],"must":[29],"be":[30,106,125],"considered":[31],"in":[32,81],"order":[33],"to":[34,72],"accurately":[35,73],"estimate":[36],"overall":[38],"impact":[40,54],"design":[42],"functionality":[43],"performances.In":[45],"this":[46],"work":[47],"general":[49],"macromodel":[50],"that":[51,70,90,123],"considers":[52],"cell":[57,78],"non-linearity":[58],"glitch":[62],"waveform":[63],"is":[64,85],"proposed,":[65],"new":[68],"approach":[69],"allows":[71],"efficiently":[75],"modeling":[76],"non-linear":[79],"effects":[80],"Static":[82],"Noise":[83],"Analysis":[84],"presented.":[86],"Experimental":[87],"results":[88],"confirm":[89],"existing":[91],"analysis":[93,130],"approaches":[94],"based":[95],"linear":[97],"superposition":[98],"crosstalk-injected":[103],"can":[105,124],"highly":[107],"inaccurate,":[108],"thus":[109],"impairing":[110],"sign-off":[112],"functional":[113],"verification":[114],"phase,":[115],"demonstrate":[117],"effectiveness":[119],"our":[121],"method":[122],"seamlessly":[126],"integrated":[127],"into":[128],"tools.":[131]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}