{"id":"https://openalex.org/W1970415877","doi":"https://doi.org/10.1145/1057661.1057731","title":"A VLSI array processing oriented fast fourier transform algorithm and hardware implementation","display_name":"A VLSI array processing oriented fast fourier transform algorithm and hardware implementation","publication_year":2005,"publication_date":"2005-04-17","ids":{"openalex":"https://openalex.org/W1970415877","doi":"https://doi.org/10.1145/1057661.1057731","mag":"1970415877"},"language":"en","primary_location":{"id":"doi:10.1145/1057661.1057731","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057731","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100405177","display_name":"Zhenyu Liu","orcid":"https://orcid.org/0000-0002-6270-9475"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Zhenyu Liu","raw_affiliation_strings":["Waseda University, Kitakyushu City, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Waseda University, Kitakyushu City, Japan","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054453371","display_name":"Yang Song","orcid":"https://orcid.org/0000-0002-9477-567X"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yang Song","raw_affiliation_strings":["Waseda University, Kitakyushu City, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Waseda University, Kitakyushu City, Japan","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103206427","display_name":"Takeshi Ikenaga","orcid":"https://orcid.org/0000-0001-8338-8175"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takeshi Ikenaga","raw_affiliation_strings":["Waseda University, Kitakyushu City, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Waseda University, Kitakyushu City, Japan","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101825973","display_name":"Satoshi Goto","orcid":"https://orcid.org/0000-0002-6387-048X"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Satoshi Goto","raw_affiliation_strings":["Waseda University, Kitakyushu City, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Waseda University, Kitakyushu City, Japan","institution_ids":["https://openalex.org/I150744194"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.324,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.5613304,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"291","last_page":"295"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.8312331438064575},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7268126010894775},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6434025764465332},{"id":"https://openalex.org/keywords/split-radix-fft-algorithm","display_name":"Split-radix FFT algorithm","score":0.6367394328117371},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5800398588180542},{"id":"https://openalex.org/keywords/prime-factor-fft-algorithm","display_name":"Prime-factor FFT algorithm","score":0.5789310932159424},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5788760185241699},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5612505078315735},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.47542980313301086},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4699340760707855},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4425649642944336},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.41344454884529114},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.27223125100135803},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.19696417450904846},{"id":"https://openalex.org/keywords/fractional-fourier-transform","display_name":"Fractional Fourier transform","score":0.10472634434700012},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10470512509346008},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.08103364706039429},{"id":"https://openalex.org/keywords/fourier-analysis","display_name":"Fourier analysis","score":0.07999354600906372}],"concepts":[{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.8312331438064575},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7268126010894775},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6434025764465332},{"id":"https://openalex.org/C103755468","wikidata":"https://www.wikidata.org/wiki/Q17103599","display_name":"Split-radix FFT algorithm","level":5,"score":0.6367394328117371},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5800398588180542},{"id":"https://openalex.org/C77928272","wikidata":"https://www.wikidata.org/wiki/Q7243214","display_name":"Prime-factor FFT algorithm","level":5,"score":0.5789310932159424},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5788760185241699},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5612505078315735},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.47542980313301086},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4699340760707855},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4425649642944336},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.41344454884529114},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.27223125100135803},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.19696417450904846},{"id":"https://openalex.org/C76563020","wikidata":"https://www.wikidata.org/wiki/Q4817582","display_name":"Fractional Fourier transform","level":4,"score":0.10472634434700012},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10470512509346008},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.08103364706039429},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.07999354600906372},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1057661.1057731","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057731","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5099999904632568,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1551714862","https://openalex.org/W1927015038","https://openalex.org/W1943538705","https://openalex.org/W1978231058","https://openalex.org/W1980493351","https://openalex.org/W2009267427","https://openalex.org/W2038565554","https://openalex.org/W2039154210","https://openalex.org/W2061171222","https://openalex.org/W2110806411","https://openalex.org/W2114093826","https://openalex.org/W2123287621","https://openalex.org/W2124218552","https://openalex.org/W2138245082"],"related_works":["https://openalex.org/W2031343199","https://openalex.org/W2356814585","https://openalex.org/W2977460836","https://openalex.org/W2144412928","https://openalex.org/W2113951268","https://openalex.org/W4362564158","https://openalex.org/W1984254719","https://openalex.org/W2185259940","https://openalex.org/W2012363129","https://openalex.org/W2144032791"],"abstract_inverted_index":{"Many":[0],"parallel":[1,54],"Fast":[2],"Fourier":[3],"Transform":[4],"(FFT)":[5],"algorithms":[6],"adopt":[7],"multiple":[8],"stages":[9,18],"architecture":[10,100,115],"to":[11,36,51,73,121],"increase":[12,89],"performance.":[13,109],"However,":[14],"data":[15,57,65],"permutation":[16],"between":[17,104],"consumes":[19],"volume":[20],"memory":[21,69],"and":[22,107,141],"processing":[23,28,98],"time.":[24],"An":[25,110],"FFT":[26,114,156],"array":[27,97],"mapping":[29,124],"algorithm":[30],"is":[31,67,71,119,128,138,144],"proposed":[32],"in":[33,53,146,158],"this":[34,38,41,123],"paper":[35],"overcome":[37],"demerit.":[39],"In":[40],"algorithm,":[42],"arbitrary":[43],"2k":[44],"butterfly":[45],"units":[46],"(BUs)":[47],"could":[48,153],"be":[49],"scheduled":[50],"work":[52],"on":[55],"n=22":[56],"(k=0,":[58],"1,...,":[59],"s-1).":[60],"Because":[61],"no":[62],"inter":[63],"stage":[64],"transfer":[66],"required,":[68],"consumption":[70],"reduced":[72],"1/3":[74],"of":[75,83],"the":[76,81],"original":[77],"algorithm.":[78,125],"Moreover,":[79],"with":[80,116,130],"increasing":[82],"BUs,":[84],"not":[85],"only":[86],"does":[87],"throughput":[88],"linearly,":[90],"system":[91,108],"latency":[92],"also":[93],"decreases":[94],"linearly.":[95],"This":[96,151],"orientated":[99],"provides":[101],"flexible":[102],"tradeoff":[103],"hardware":[105],"cost":[106],"18-bit":[111],"word-length":[112],"1024-point":[113],"4":[117],"BUs":[118],"given":[120],"demonstrate":[122],"The":[126,135],"design":[127],"implemented":[129],"TSMC":[131],"0.18\u03bcm":[132],"CMOS":[133],"technology.":[134],"core":[136],"area":[137],"2.99x1.12mm":[139],"2":[140],"clock":[142],"frequency":[143],"326MHz":[145],"typical":[147],"condition":[148],"(1.8V,":[149],"25\u00b0C).":[150],"processor":[152],"complete":[154],"1024":[155],"calculation":[157],"7.839\u03bcs.":[159]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}