{"id":"https://openalex.org/W2144178717","doi":"https://doi.org/10.1145/1057661.1057719","title":"Fine-grain leakage optimization in SRAM based FPGAs","display_name":"Fine-grain leakage optimization in SRAM based FPGAs","publication_year":2005,"publication_date":"2005-04-17","ids":{"openalex":"https://openalex.org/W2144178717","doi":"https://doi.org/10.1145/1057661.1057719","mag":"2144178717"},"language":"en","primary_location":{"id":"doi:10.1145/1057661.1057719","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057719","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103540413","display_name":"Somsubhra Mondal","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Somsubhra Mondal","raw_affiliation_strings":["Northwestern University, Evanston, IL"],"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston, IL","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111716641","display_name":"Seda \u00d6\u01e7renci Memik","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Seda Ogrenci Memik","raw_affiliation_strings":["Northwestern University, Evanston, IL"],"affiliations":[{"raw_affiliation_string":"Northwestern University, Evanston, IL","institution_ids":["https://openalex.org/I111979921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5103540413"],"corresponding_institution_ids":["https://openalex.org/I111979921"],"apc_list":null,"apc_paid":null,"fwci":0.3557,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.6753843,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"238","last_page":"243"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.9094412326812744},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7649639844894409},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.727432906627655},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6833709478378296},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5890447497367859},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.585020124912262},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5000038146972656},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48720091581344604},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.4773833155632019},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.4240977466106415},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3788367211818695},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30893003940582275},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.26789867877960205},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22749868035316467},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16957581043243408},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08889976143836975}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.9094412326812744},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7649639844894409},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.727432906627655},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6833709478378296},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5890447497367859},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.585020124912262},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5000038146972656},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48720091581344604},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.4773833155632019},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.4240977466106415},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3788367211818695},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30893003940582275},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.26789867877960205},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22749868035316467},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16957581043243408},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08889976143836975},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1057661.1057719","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057719","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W141741427","https://openalex.org/W1523051745","https://openalex.org/W1543643719","https://openalex.org/W1556692483","https://openalex.org/W2022698427","https://openalex.org/W2033110462","https://openalex.org/W2083626899","https://openalex.org/W2097521167","https://openalex.org/W2105715355","https://openalex.org/W2112440433","https://openalex.org/W2113774867","https://openalex.org/W2120397377","https://openalex.org/W2124021899","https://openalex.org/W2131862714","https://openalex.org/W2137978438","https://openalex.org/W2151731855","https://openalex.org/W2163108907","https://openalex.org/W2165788555","https://openalex.org/W2170510975","https://openalex.org/W3141004699"],"related_works":["https://openalex.org/W2297319780","https://openalex.org/W2178217057","https://openalex.org/W1972800815","https://openalex.org/W2548830639","https://openalex.org/W2159770326","https://openalex.org/W4252086734","https://openalex.org/W1505038800","https://openalex.org/W2051027227","https://openalex.org/W4301258909","https://openalex.org/W2953793304"],"abstract_inverted_index":{"FPGAs":[0,41],"are":[1],"evolving":[2],"at":[3],"a":[4,24,34,49],"rapid":[5],"pace":[6],"with":[7,102],"improved":[8],"performance":[9],"and":[10,61,99],"logic":[11],"density.":[12],"At":[13],"the":[14,53,78,85,91,103],"same":[15],"time,":[16],"trends":[17],"in":[18,125,143],"technology":[19],"scaling":[20],"makes":[21],"leakage":[22,44,126],"power":[23,45,127],"serious":[25],"concern":[26],"for":[27,40,111,136,145,151],"designers.":[28],"In":[29,77],"this":[30,109],"paper,":[31],"we":[32,62,93,114],"propose":[33],"hierarchical":[35,80],"look-up":[36],"table":[37],"(LUT)":[38],"structure":[39,82],"to":[42],"improve":[43],"consumption.":[46],"We":[47],"present":[48],"detailed":[50],"analysis":[51],"on":[52,65,84,108],"number":[54,86],"of":[55,87,119],"inputs":[56,88],"actually":[57],"used":[58,89],"by":[59,90],"LUTs,":[60],"observe":[63],"that":[64],"an":[66,116],"average":[67,117],"47%":[68],"LUTs":[69,92],"do":[70],"not":[71],"use":[72,144],"one":[73],"or":[74],"more":[75],"inputs.":[76,106],"proposed":[79],"LUT":[81,105],"depending":[83],"shut":[94],"off":[95],"certain":[96],"SRAM":[97],"cells":[98],"transistors":[100],"associated":[101],"unused":[104],"Based":[107],"technique,":[110],"180nm":[112],"technology,":[113],"report":[115],"savings":[118,131],"22.94%":[120],"(as":[121],"high":[122],"as":[123,138,140,148,150],"64.22%)":[124],"per":[128],"LUT.":[129],"The":[130],"will":[132],"be":[133],"even":[134],"greater":[135],"technologies":[137],"low":[139],"90nm":[141],"currently":[142],"FPGA":[146],"production":[147],"well":[149],"future":[152],"technologies.":[153]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
