{"id":"https://openalex.org/W2120957918","doi":"https://doi.org/10.1145/1057661.1057708","title":"Diagnosing multiple transition faults in the absence of timing information","display_name":"Diagnosing multiple transition faults in the absence of timing information","publication_year":2005,"publication_date":"2005-04-17","ids":{"openalex":"https://openalex.org/W2120957918","doi":"https://doi.org/10.1145/1057661.1057708","mag":"2120957918"},"language":"en","primary_location":{"id":"doi:10.1145/1057661.1057708","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057708","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017231650","display_name":"Jiang Brandon Liu","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Jiang Brandon Liu","raw_affiliation_strings":["High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX","High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX","institution_ids":[]},{"raw_affiliation_string":"High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX#TAB#","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011349515","display_name":"Magdy S. Abadir","orcid":"https://orcid.org/0000-0003-4046-2472"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Magdy Abadir","raw_affiliation_strings":["High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX","High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX","institution_ids":[]},{"raw_affiliation_string":"High Perf. Tools and Meth. Freescale Semiconductor, Austin, TX#TAB#","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009841786","display_name":"Andreas Veneris","orcid":"https://orcid.org/0000-0002-6309-8821"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Andreas Veneris","raw_affiliation_strings":["University of Toronto, Toronto, ON","University of Toronto , Toronto, ON,"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto , Toronto, ON,","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111477668","display_name":"Sean Safarpour","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Sean Safarpour","raw_affiliation_strings":["University of Toronto, Toronto, ON","University of Toronto , Toronto, ON,"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto , Toronto, ON,","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5017231650"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2578,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.59438776,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"193","last_page":"196"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7291818261146545},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6603612899780273},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6213010549545288},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5256789326667786},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.47325947880744934},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4617348909378052},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4556451737880707},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.44907739758491516},{"id":"https://openalex.org/keywords/transition","display_name":"Transition (genetics)","score":0.4489084780216217},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4471559226512909},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4342513680458069},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.43014711141586304},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21596181392669678},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17300909757614136}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7291818261146545},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6603612899780273},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6213010549545288},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5256789326667786},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.47325947880744934},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4617348909378052},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4556451737880707},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.44907739758491516},{"id":"https://openalex.org/C194232998","wikidata":"https://www.wikidata.org/wiki/Q1606712","display_name":"Transition (genetics)","level":3,"score":0.4489084780216217},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4471559226512909},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4342513680458069},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.43014711141586304},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21596181392669678},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17300909757614136},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1057661.1057708","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057708","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W13277579","https://openalex.org/W1554885925","https://openalex.org/W1583304273","https://openalex.org/W1963105722","https://openalex.org/W2061946964","https://openalex.org/W2089637397","https://openalex.org/W2096541971","https://openalex.org/W2113070789","https://openalex.org/W2135412235","https://openalex.org/W2148397050","https://openalex.org/W2158870111","https://openalex.org/W2163733344","https://openalex.org/W6600530048"],"related_works":["https://openalex.org/W29481652","https://openalex.org/W4248668797","https://openalex.org/W2110968362","https://openalex.org/W4238178324","https://openalex.org/W3141297747","https://openalex.org/W818963952","https://openalex.org/W1939541994","https://openalex.org/W1603944672","https://openalex.org/W1851795671","https://openalex.org/W2146663621"],"abstract_inverted_index":{"As":[0],"timing":[1,18],"requirements":[2],"in":[3],"today's":[4],"advanced":[5],"VLSI":[6],"designs":[7],"become":[8],"more":[9],"aggressive,":[10],"the":[11,41],"need":[12],"for":[13],"automated":[14],"tools":[15],"to":[16],"diagnose":[17],"failures":[19],"increases.":[20],"This":[21],"work":[22],"presents":[23],"two":[24],"such":[25],"algorithms":[26,75],"capable":[27],"of":[28,62,73],"diagnosing":[29],"multiple":[30,36,68],"delay":[31],"faults.":[32,70],"One":[33],"method":[34],"uses":[35],"transition":[37,69],"fault":[38],"models":[39],"and":[40,59,78,85],"other":[42],"reasons":[43],"with":[44,67],"ternary":[45],"logic":[46],"values,":[47],"thus":[48],"achieving":[49],"model":[50],"independent":[51],"diagnosis.":[52],"Experiments":[53],"are":[54,76],"conducted":[55],"on":[56],"IS-CAS'85":[57],"combinational":[58],"full-scan":[60],"version":[61],"ISCAS'89":[63],"se-quential":[64],"circuits":[65],"corrupted":[66],"The":[71,80],"performance":[72],"both":[74],"evaluated":[77],"compared.":[79],"results":[81],"show":[82],"good":[83],"efficiency":[84],"diagnostic":[86],"resolution.":[87]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
