{"id":"https://openalex.org/W2115548981","doi":"https://doi.org/10.1145/1057661.1057695","title":"Noise aware behavioral modeling of the \u0395-\u0394 fractional-N frequency synthesizer","display_name":"Noise aware behavioral modeling of the \u0395-\u0394 fractional-N frequency synthesizer","publication_year":2005,"publication_date":"2005-04-17","ids":{"openalex":"https://openalex.org/W2115548981","doi":"https://doi.org/10.1145/1057661.1057695","mag":"2115548981"},"language":"en","primary_location":{"id":"doi:10.1145/1057661.1057695","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057695","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037587077","display_name":"Lei Yang","orcid":"https://orcid.org/0000-0001-8393-7189"},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Lei Yang","raw_affiliation_strings":["University of Washington, Seattle, WA","University Of Washington (Seattle, WA)"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"University Of Washington (Seattle, WA)","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010474540","display_name":"Cherry Wakayama","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cherry Wakayama","raw_affiliation_strings":["University of Washington, Seattle, WA","University Of Washington (Seattle, WA)"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"University Of Washington (Seattle, WA)","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036775341","display_name":"C.\u2010J. Richard Shi","orcid":"https://orcid.org/0000-0002-3157-3464"},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C.-J. Richard Shi","raw_affiliation_strings":["University of Washington, Seattle, WA","University Of Washington (Seattle, WA)"],"affiliations":[{"raw_affiliation_string":"University of Washington, Seattle, WA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"University Of Washington (Seattle, WA)","institution_ids":["https://openalex.org/I201448701"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5037587077"],"corresponding_institution_ids":["https://openalex.org/I201448701"],"apc_list":null,"apc_paid":null,"fwci":0.3557,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.66605645,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"138","last_page":"142"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9883999824523926,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9876999855041504,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.7596231698989868},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7292210459709167},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5344677567481995},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.5325360298156738},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5273869037628174},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.4974224865436554},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.48661765456199646},{"id":"https://openalex.org/keywords/dither","display_name":"Dither","score":0.46807751059532166},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.4600370526313782},{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.45552879571914673},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.4178469181060791},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.396095335483551},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2508572041988373},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21289607882499695}],"concepts":[{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.7596231698989868},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7292210459709167},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5344677567481995},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.5325360298156738},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5273869037628174},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.4974224865436554},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.48661765456199646},{"id":"https://openalex.org/C70451592","wikidata":"https://www.wikidata.org/wiki/Q376493","display_name":"Dither","level":3,"score":0.46807751059532166},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.4600370526313782},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.45552879571914673},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.4178469181060791},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.396095335483551},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2508572041988373},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21289607882499695},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1057661.1057695","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1057661.1057695","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1500373038","https://openalex.org/W1531446014","https://openalex.org/W1997919089","https://openalex.org/W2103018069","https://openalex.org/W2110794228","https://openalex.org/W2124729073","https://openalex.org/W2127063672","https://openalex.org/W2133676222","https://openalex.org/W2171035445","https://openalex.org/W4233622498","https://openalex.org/W6820230412"],"related_works":["https://openalex.org/W2166555237","https://openalex.org/W2622028395","https://openalex.org/W2161572852","https://openalex.org/W4386197759","https://openalex.org/W2389258116","https://openalex.org/W2393010087","https://openalex.org/W2015962950","https://openalex.org/W3027303490","https://openalex.org/W2246724580","https://openalex.org/W2029029987"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,24,28,68,77,81,86,91,113],"behavioral":[4,73,105],"model":[5],"of":[6,14,27,112],"a":[7,109],"\u0395-\u0394":[8,55],"fractional-N":[9],"frequency":[10,45],"synthesizer":[11],"in":[12,40,49,72,95],"terms":[13],"different":[15,30],"noise":[16,26,32,39,48,64,83,120],"sources":[17,33],"and":[18,43,62,97,116],"non-ideal":[19],"effects.":[20],"To":[21],"accurately":[22],"predict":[23],"phase":[25,36,88,119],"synthesizer,":[29],"jitter":[31],"such":[34],"as":[35],"modulation":[37,46],"(PM)":[38],"phase-frequency":[41],"detector":[42],"divider,":[44],"(FM)":[47],"VCO":[50],"are":[51,93],"properly":[52],"depicted.":[53],"The":[54],"modulator,":[56],"with":[57],"its":[58],"divider":[59],"value":[60],"dithered":[61],"quantization":[63,82],"dynamically":[65],"injected":[66],"to":[67,79,85],"PLL,":[69],"is":[70],"described":[71],"model,":[74],"which":[75],"allows":[76],"designer":[78],"study":[80],"impaction":[84],"PLL":[87,114],"noise.":[89],"All":[90],"models":[92],"implemented":[94],"VHDL-AMS":[96],"simulated":[98],"using":[99],"Mentor":[100],"Graphics":[101],"ADvance-MS":[102],"(ADMS).":[103],"Our":[104],"modeling":[106],"method":[107],"enables":[108],"fast":[110],"simulation":[111],"system":[115],"an":[117],"accurate":[118],"prediction.":[121]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
