{"id":"https://openalex.org/W2174922170","doi":"https://doi.org/10.1145/1055137.1055149","title":"Delay insertion method in clock skew scheduling","display_name":"Delay insertion method in clock skew scheduling","publication_year":2005,"publication_date":"2005-04-03","ids":{"openalex":"https://openalex.org/W2174922170","doi":"https://doi.org/10.1145/1055137.1055149","mag":"2174922170"},"language":"en","primary_location":{"id":"doi:10.1145/1055137.1055149","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1055137.1055149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 international symposium on Physical design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081080799","display_name":"Bar\u0131\u015f Ta\u015fk\u0131n","orcid":"https://orcid.org/0000-0002-7631-5696"},"institutions":[{"id":"https://openalex.org/I170201317","display_name":"University of Pittsburgh","ror":"https://ror.org/01an3r305","country_code":"US","type":"education","lineage":["https://openalex.org/I170201317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Baris Taskin","raw_affiliation_strings":["University of Pittsburgh, Pittsburgh, PA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pittsburgh, Pittsburgh, PA","institution_ids":["https://openalex.org/I170201317"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070703425","display_name":"Ivan S. Kourtev","orcid":null},"institutions":[{"id":"https://openalex.org/I170201317","display_name":"University of Pittsburgh","ror":"https://ror.org/01an3r305","country_code":"US","type":"education","lineage":["https://openalex.org/I170201317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ivan S. Kourtev","raw_affiliation_strings":["University of Pittsburgh, Pittsburgh, PA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pittsburgh, Pittsburgh, PA","institution_ids":["https://openalex.org/I170201317"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I170201317"],"apc_list":null,"apc_paid":null,"fwci":1.4541,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.84163584,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"47","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.939513623714447},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.9144283533096313},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.9114137291908264},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.8063055276870728},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.8011704683303833},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.7914276123046875},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.6507553458213806},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.6204531788825989},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6059597730636597},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.511580765247345},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.4596303403377533},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.42017853260040283},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.390407532453537},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34688714146614075},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1964704990386963},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1952192187309265},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18597635626792908},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10285079479217529},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.08581915497779846},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.057276010513305664}],"concepts":[{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.939513623714447},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.9144283533096313},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.9114137291908264},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.8063055276870728},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.8011704683303833},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.7914276123046875},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.6507553458213806},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.6204531788825989},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6059597730636597},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.511580765247345},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.4596303403377533},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.42017853260040283},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.390407532453537},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34688714146614075},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1964704990386963},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1952192187309265},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18597635626792908},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10285079479217529},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.08581915497779846},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.057276010513305664}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1055137.1055149","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1055137.1055149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 international symposium on Physical design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5600000023841858,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W51910399","https://openalex.org/W1504542863","https://openalex.org/W1588345844","https://openalex.org/W1875554762","https://openalex.org/W1964666600","https://openalex.org/W2011778848","https://openalex.org/W2084481616","https://openalex.org/W2097181398","https://openalex.org/W2105182493","https://openalex.org/W2112242460","https://openalex.org/W2119211217","https://openalex.org/W2122724421","https://openalex.org/W2135347849","https://openalex.org/W2145880762","https://openalex.org/W2145967198","https://openalex.org/W2147918349","https://openalex.org/W2153574826","https://openalex.org/W2155474020","https://openalex.org/W2155911206","https://openalex.org/W2156162117","https://openalex.org/W2157465781","https://openalex.org/W2180470884","https://openalex.org/W2914176325","https://openalex.org/W2914931491","https://openalex.org/W3159023033","https://openalex.org/W4323915497","https://openalex.org/W6601558329","https://openalex.org/W7033720462"],"related_works":["https://openalex.org/W3006003651","https://openalex.org/W2088914741","https://openalex.org/W2040807843","https://openalex.org/W4247180033","https://openalex.org/W2559451387","https://openalex.org/W4249038728","https://openalex.org/W2133326759","https://openalex.org/W2617666058","https://openalex.org/W2127892766","https://openalex.org/W1564063853"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,30,41,95],"delay":[4,101,125],"insertion":[5,102,108,126],"method":[6,127],"that":[7],"improves":[8],"the":[9,27,36,48,51,65,72,104,114,157,176],"efficiency":[10],"of":[11,29,50,85,145,181],"clock":[12,43,62,73,82,86,116,120,142,152,158,163],"skew":[13,16,63,121,153],"scheduling.":[14,122],"Clock":[15],"scheduling":[17,154],"is":[18,69,76,128],"performed":[19],"on":[20,132,172],"synchronous":[21,137],"circuits":[22,138,167],"in":[23,110],"order":[24,55,111],"to":[25,38,78,112,140,170],"improve":[26,113],"performance":[28],"circuit;":[31],"most":[32],"often":[33],"by":[34,46],"permitting":[35],"circuit":[37,52,67,96,105],"operate":[39],"at":[40],"lower":[42],"period":[44,117,143,159],"or":[45],"increasing":[47],"tolerance":[49],"against":[53],"secondary":[54],"effects":[56],"and":[57,130,135,147,178],"process":[58],"parameter":[59],"variations.":[60],"With":[61],"scheduling,":[64],"original":[66],"topology":[68],"preserved":[70],"while":[71],"distribution":[74],"network":[75],"modified":[77],"satisfy":[79],"an":[80],"optimal":[81],"schedule":[83],"(set":[84],"signal":[87],"arrival":[88],"delays).":[89],"The":[90,123],"work":[91],"presented":[92],"here":[93],"studies":[94],"modification":[97],"technique":[98],"requiring":[99],"systematic":[100],"within":[103],"logic":[106],"(delay":[107],"method)":[109],"minimum":[115],"achieved":[118],"through":[119],"proposed":[124],"defined":[129],"demonstrated":[131],"both":[133,174],"edge-triggered":[134,177],"level-sensitive":[136,179],"leading":[139],"average":[141],"improvements":[144,160],"9%":[146],"10%,":[148],"respectively,":[149],"over":[150,161],"standard":[151],"algorithms.":[155],"Overall,":[156],"zero":[162],"skew,":[164],"flip-flop":[165],"based":[166],"are":[168],"improved":[169],"34%":[171],"average,":[173],"for":[175],"designs":[180],"ISCAS'89":[182],"benchmark":[183],"circuits.":[184]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}