{"id":"https://openalex.org/W2018502123","doi":"https://doi.org/10.1145/1046192.1046258","title":"Rapid prototyping of a test harness for forward error correcting codes (abstract only)","display_name":"Rapid prototyping of a test harness for forward error correcting codes (abstract only)","publication_year":2005,"publication_date":"2005-02-20","ids":{"openalex":"https://openalex.org/W2018502123","doi":"https://doi.org/10.1145/1046192.1046258","mag":"2018502123"},"language":"en","primary_location":{"id":"doi:10.1145/1046192.1046258","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046258","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048239005","display_name":"Edward F. Brown","orcid":"https://orcid.org/0000-0003-3806-5339"},"institutions":[{"id":"https://openalex.org/I2799593479","display_name":"Education Scotland","ror":"https://ror.org/05yapj268","country_code":"GB","type":"government","lineage":["https://openalex.org/I2799593479","https://openalex.org/I2801269068"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Edward Brown","raw_affiliation_strings":["ISLI, Alba Campus, Livingston, UK"],"affiliations":[{"raw_affiliation_string":"ISLI, Alba Campus, Livingston, UK","institution_ids":["https://openalex.org/I2799593479"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086712853","display_name":"James Irvine","orcid":"https://orcid.org/0000-0003-2078-6517"},"institutions":[{"id":"https://openalex.org/I181647926","display_name":"University of Strathclyde","ror":"https://ror.org/00n3w3b69","country_code":"GB","type":"education","lineage":["https://openalex.org/I181647926"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"James Irvine","raw_affiliation_strings":["University of Strathclyde, Glasgow, UK","[University of Strathclyde, Glasgow, UK]"],"affiliations":[{"raw_affiliation_string":"University of Strathclyde, Glasgow, UK","institution_ids":["https://openalex.org/I181647926"]},{"raw_affiliation_string":"[University of Strathclyde, Glasgow, UK]","institution_ids":["https://openalex.org/I181647926"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031732966","display_name":"Bill Wilkie","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bill Wilkie","raw_affiliation_strings":["Xilinx, San Jose, CA","[Xilinx, San Jose, CA]"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"[Xilinx, San Jose, CA]","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5048239005"],"corresponding_institution_ids":["https://openalex.org/I2799593479"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12893282,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"276","last_page":"276"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cdma2000","display_name":"CDMA2000","score":0.7478320002555847},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7198019623756409},{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.7177392840385437},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6911587119102478},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6089712977409363},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4646902084350586},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45776867866516113},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.44641929864883423},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.44307228922843933},{"id":"https://openalex.org/keywords/software-prototyping","display_name":"Software prototyping","score":0.43289902806282043},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.42111679911613464},{"id":"https://openalex.org/keywords/turbo-code","display_name":"Turbo code","score":0.4107246696949005},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.3110327124595642},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.21887117624282837},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1564267873764038},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.13971808552742004},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13962966203689575},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.08516675233840942}],"concepts":[{"id":"https://openalex.org/C39183613","wikidata":"https://www.wikidata.org/wiki/Q1023122","display_name":"CDMA2000","level":3,"score":0.7478320002555847},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7198019623756409},{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.7177392840385437},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6911587119102478},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6089712977409363},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4646902084350586},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45776867866516113},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.44641929864883423},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.44307228922843933},{"id":"https://openalex.org/C2776697782","wikidata":"https://www.wikidata.org/wiki/Q576460","display_name":"Software prototyping","level":4,"score":0.43289902806282043},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.42111679911613464},{"id":"https://openalex.org/C114504821","wikidata":"https://www.wikidata.org/wiki/Q2164281","display_name":"Turbo code","level":3,"score":0.4107246696949005},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.3110327124595642},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.21887117624282837},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1564267873764038},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.13971808552742004},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13962966203689575},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.08516675233840942},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1046192.1046258","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046258","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1982977229","https://openalex.org/W2535923291","https://openalex.org/W2352132913","https://openalex.org/W2082817780","https://openalex.org/W1602894748","https://openalex.org/W240386653","https://openalex.org/W2128779626","https://openalex.org/W2334805788","https://openalex.org/W2463211945","https://openalex.org/W2388393830"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,59,91],"design":[4],"flow":[5],"for":[6,55,96],"the":[7,17,39,42,49,70,80,103],"rapid":[8],"prototyping":[9],"of":[10,79,93,102],"forward":[11],"error":[12],"correction":[13],"(FEC)":[14],"systems":[15,27],"in":[16],"Xilinx":[18],"System":[19,66],"Generator":[20,67],"tool.":[21],"In":[22],"this":[23,56],"instance":[24],"two":[25],"FEC":[26],"were":[28],"tested,":[29],"both":[30,97],"Turbo":[31,72],"codec's.":[32],"One":[33],"was":[34,44],"designed":[35,45],"to":[36,46],"comply":[37,47],"with":[38,48,87],"UMTS":[40],"standard,":[41],"other":[43],"cdma2000":[50,71],"standard.":[51],"The":[52,65],"target":[53],"hardware":[54,98],"system":[57],"is":[58,84],"Field":[60],"Programmable":[61],"Gate":[62],"Array":[63],"(FPGA).":[64],"tool":[68],"and":[69,90,99],"code":[73],"standard":[74],"are":[75],"discussed.":[76],"A":[77],"description":[78],"implemented":[81],"test":[82],"harness":[83],"given":[85],"along":[86],"simulation":[88,94],"results":[89],"comparison":[92],"times":[95],"software":[100],"implementations":[101],"system.":[104]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
