{"id":"https://openalex.org/W2084351885","doi":"https://doi.org/10.1145/1046192.1046240","title":"Energy-efficient FPGA interconnect architecture design (abstract only)","display_name":"Energy-efficient FPGA interconnect architecture design (abstract only)","publication_year":2005,"publication_date":"2005-02-20","ids":{"openalex":"https://openalex.org/W2084351885","doi":"https://doi.org/10.1145/1046192.1046240","mag":"2084351885"},"language":"en","primary_location":{"id":"doi:10.1145/1046192.1046240","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046240","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052819753","display_name":"Rohini Krishnan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Rohini Krishnan","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, The Netherlands","Philips' Research Laboratories, Eindhoven The Netherlands"],"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I4210122849"]},{"raw_affiliation_string":"Philips' Research Laboratories, Eindhoven The Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021950644","display_name":"Roy Meijer","orcid":null},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"R. I.M.P. Meijer","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, The Netherlands","Philips' Research Laboratories, Eindhoven The Netherlands"],"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I4210122849"]},{"raw_affiliation_string":"Philips' Research Laboratories, Eindhoven The Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058375440","display_name":"Guillaume Durand","orcid":"https://orcid.org/0000-0002-5418-4429"},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Durand Guillaume","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, The Netherlands","Philips' Research Laboratories, Eindhoven The Netherlands"],"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, The Netherlands","institution_ids":["https://openalex.org/I4210122849"]},{"raw_affiliation_string":"Philips' Research Laboratories, Eindhoven The Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5052819753"],"corresponding_institution_ids":["https://openalex.org/I4210122849"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16100396,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"268","last_page":"268"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6090087890625},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6034384965896606},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5491150617599487},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5237184166908264},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4467678964138031},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.41686713695526123},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3584907650947571},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34148597717285156},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28044837713241577},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10452967882156372},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08480972051620483}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6090087890625},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6034384965896606},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5491150617599487},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5237184166908264},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4467678964138031},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41686713695526123},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3584907650947571},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34148597717285156},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28044837713241577},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10452967882156372},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08480972051620483},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1046192.1046240","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046240","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2155019192","https://openalex.org/W2014709025","https://openalex.org/W2766970861","https://openalex.org/W3125341812","https://openalex.org/W1991674760","https://openalex.org/W1668171714","https://openalex.org/W2155297398","https://openalex.org/W4380607112","https://openalex.org/W2218294330","https://openalex.org/W1997278405"],"abstract_inverted_index":{"In":[0],"this":[1],"work,":[2],"the":[3,20,31,77,87,95,100,102,142,148],"design":[4],"of":[5,43,63,79,128,162,187,217,227],"an":[6,73,125,182],"energy-efficient":[7],"FPGA":[8],"interconnect":[9,32,109,230],"architecture":[10,56],"has":[11,57],"been":[12,58,240],"investigated.":[13],"It":[14,67,201],"concerns":[15],"a":[16,26,37,44,46,51,61,105,136,152,225,246],"dual-supply":[17],"solution,":[18],"where":[19],"logic":[21],"blocks":[22],"are":[23],"powered":[24,35],"by":[25,36,212],"nominal":[27],"voltage":[28,39,97],"supply":[29,65,91,139],"and":[30,50,54,81,89,116,130,168,193,215],"part":[33],"is":[34,68,110,121,174,199,202],"reduced":[38,137],"supply.":[40],"The":[41,237],"behaviour":[42],"fully-buffered,":[45],"fully":[47,106],"pass-transistor":[48,55,80,129,213],"based":[49],"hybrid":[52],"buffer":[53,83,132,177],"investigated":[59],"over":[60,242],"range":[62],"power":[64,90,138,155],"voltages.":[66],"found":[69,204],"that":[70,123,205],"there":[71],"exists":[72],"optimal":[74,126],"ratio":[75],"between":[76],"number":[78],"tri-state":[82,107,131,210],"switches":[84,133,214],"depending":[85],"on":[86,99],"load":[88],"involved.":[92],"By":[93],"reducing":[94],"signal":[96],"swing":[98],"interconnect,":[101],"need":[103],"for":[104,164,170,189,195],"buffer-based":[108],"eliminated,":[111],"thus":[112],"saving":[113],"valuable":[114],"area":[115,231],"power.Through":[117],"benchmark":[118],"studies,":[119],"it":[120],"confirmed":[122],"using":[124,176,218],"composite":[127],"operating":[134],"at":[135,151],"can":[140,221],"meet":[141],"same":[143],"speed":[144],"as":[145,232],"compared":[146,233],"to":[147,207,224,234],"full-swing":[149],"scenario":[150],"much":[153],"lower":[154],"consumption.":[156],"An":[157],"average":[158,183],"reduction":[159,184],"in":[160,185,229,245],"power-delay":[161,186],"4.4x":[163],"low-load":[165,190],"critical":[166,172,191,197],"paths":[167,173,192,198],"2.7x":[169],"high-load":[171,196],"achieved":[175],"receivers.":[178],"Using":[179],"levelshifter":[180],"receivers,":[181],"4.7x":[188],"2.8x":[194],"obtained.":[200],"also":[203],"due":[206],"partially":[208],"replacing":[209],"buffers":[211],"inspite":[216],"levelshifters,":[219],"we":[220],"save":[222],"up":[223],"factor":[226],"4x":[228],"fully-buffered":[235],"architectures.":[236],"results":[238],"have":[239],"validated":[241],"various":[243],"benchmarks":[244],"0.13":[247],"m":[248],"CMOS":[249],"technology.":[250]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}