{"id":"https://openalex.org/W2040485503","doi":"https://doi.org/10.1145/1046192.1046231","title":"Efficient utilization of heterogeneous routing resources for FPGAs (abstract only)","display_name":"Efficient utilization of heterogeneous routing resources for FPGAs (abstract only)","publication_year":2005,"publication_date":"2005-02-20","ids":{"openalex":"https://openalex.org/W2040485503","doi":"https://doi.org/10.1145/1046192.1046231","mag":"2040485503"},"language":"en","primary_location":{"id":"doi:10.1145/1046192.1046231","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046231","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010240011","display_name":"Deepak Rautela","orcid":null},"institutions":[{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Deepak Rautela","raw_affiliation_strings":["North Dakota State University, Fargo, ND"],"affiliations":[{"raw_affiliation_string":"North Dakota State University, Fargo, ND","institution_ids":["https://openalex.org/I57328836"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110775223","display_name":"R. Katti","orcid":null},"institutions":[{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajendra Katti","raw_affiliation_strings":["North Dakota State University, Fargo, ND"],"affiliations":[{"raw_affiliation_string":"North Dakota State University, Fargo, ND","institution_ids":["https://openalex.org/I57328836"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5010240011"],"corresponding_institution_ids":["https://openalex.org/I57328836"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15788138,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"264","last_page":"264"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7463101744651794},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7319956421852112},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.6383946537971497},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6099119782447815},{"id":"https://openalex.org/keywords/static-routing","display_name":"Static routing","score":0.6019749641418457},{"id":"https://openalex.org/keywords/multipath-routing","display_name":"Multipath routing","score":0.5921024084091187},{"id":"https://openalex.org/keywords/policy-based-routing","display_name":"Policy-based routing","score":0.5906461477279663},{"id":"https://openalex.org/keywords/link-state-routing-protocol","display_name":"Link-state routing protocol","score":0.4526795744895935},{"id":"https://openalex.org/keywords/enhanced-interior-gateway-routing-protocol","display_name":"Enhanced Interior Gateway Routing Protocol","score":0.4216483533382416},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.41440606117248535},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.37380754947662354},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3299727439880371},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.30653759837150574},{"id":"https://openalex.org/keywords/routing-protocol","display_name":"Routing protocol","score":0.2702081799507141}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7463101744651794},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7319956421852112},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.6383946537971497},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6099119782447815},{"id":"https://openalex.org/C204948658","wikidata":"https://www.wikidata.org/wiki/Q1119410","display_name":"Static routing","level":4,"score":0.6019749641418457},{"id":"https://openalex.org/C76522221","wikidata":"https://www.wikidata.org/wiki/Q5035396","display_name":"Multipath routing","level":5,"score":0.5921024084091187},{"id":"https://openalex.org/C196423136","wikidata":"https://www.wikidata.org/wiki/Q7209671","display_name":"Policy-based routing","level":5,"score":0.5906461477279663},{"id":"https://openalex.org/C89305328","wikidata":"https://www.wikidata.org/wiki/Q1755411","display_name":"Link-state routing protocol","level":4,"score":0.4526795744895935},{"id":"https://openalex.org/C87044965","wikidata":"https://www.wikidata.org/wiki/Q1091139","display_name":"Enhanced Interior Gateway Routing Protocol","level":5,"score":0.4216483533382416},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.41440606117248535},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.37380754947662354},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3299727439880371},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30653759837150574},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.2702081799507141}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1046192.1046231","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046231","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2607223747","https://openalex.org/W2082566976","https://openalex.org/W2613682624","https://openalex.org/W2286025681","https://openalex.org/W2369989480","https://openalex.org/W3163333513","https://openalex.org/W2619478018","https://openalex.org/W4214896794","https://openalex.org/W2392303844","https://openalex.org/W3134665879"],"abstract_inverted_index":{"The":[0,23,105],"routing":[1,29,45,67,70,82,91,94,101,114,142,181],"resources":[2,30,71,115,182],"available":[3],"in":[4,72],"recent":[5],"FPGA":[6,25,44,93,118,138,156],"architectures":[7,26,53,62,95,119,139],"(e.g.,":[8,20],"Xilinx":[9,21],"Virtex-II)":[10],"are":[11,74,96],"very":[12,78],"different":[13,37],"from":[14],"the":[15,43,81,87,113,135,174],"older":[16],"generation":[17],"of":[18,36,42,89,107,116,180],"FPGAs":[19,73],"XC4000).":[22],"latest":[24],"have":[27,47,150,171],"heterogeneous":[28,66,141],"which":[31,169],"include":[32],"directly":[33,64],"driven":[34,65,154],"wires":[35],"lengths":[38],"and":[39,54],"connectivity.":[40],"Most":[41],"algorithms":[46,83],"been":[48,59],"implemented":[49],"on":[50],"XC4000":[51],"style":[52],"not":[55,121],"much":[56],"work":[57],"has":[58],"reported":[60],"for":[61,80,137],"with":[63,140],"resources.":[68,143],"Since":[69],"fixed,":[75],"it":[76],"is":[77,120],"important":[79],"to":[84,109,133],"fully":[85],"exploit":[86],"potential":[88],"new":[90],"architectures.":[92],"usually":[97],"represented":[98],"as":[99],"a":[100,122,130,152,163],"resource":[102],"graph":[103],"(RRG).":[104],"construction":[106,147],"RRG":[108,136,146],"accurately":[110],"model":[111],"all":[112],"current":[117],"trivial":[123],"task.":[124],"In":[125],"this":[126],"paper":[127],"we":[128,149,170],"present":[129,162],"simplified":[131],"scheme":[132,148],"build":[134],"Using":[144],"our":[145],"built":[151],"routability":[153],"detailed":[155],"router":[157],"named":[158],"Bison.":[159],"We":[160],"also":[161],"dynamic":[164],"weight":[165],"update":[166],"based":[167],"heuristic":[168],"incorporated":[172],"into":[173],"router,":[175],"so":[176],"that":[177],"efficient":[178],"utilization":[179],"can":[183],"be":[184],"achieved.":[185]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
