{"id":"https://openalex.org/W2036005849","doi":"https://doi.org/10.1145/1046192.1046227","title":"Figaro","display_name":"Figaro","publication_year":2005,"publication_date":"2005-02-20","ids":{"openalex":"https://openalex.org/W2036005849","doi":"https://doi.org/10.1145/1046192.1046227","mag":"2036005849"},"language":"en","primary_location":{"id":"doi:10.1145/1046192.1046227","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046227","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005548128","display_name":"Kelly Nasi","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Kelly Nasi","raw_affiliation_strings":["Atmel Hellas, S.A., Papazachariou, Dimitros, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Atmel Hellas, S.A., Papazachariou, Dimitros, Athens, Greece","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000486088","display_name":"Martin Dan\u011bk","orcid":null},"institutions":[{"id":"https://openalex.org/I202391551","display_name":"Czech Academy of Sciences","ror":"https://ror.org/053avzc18","country_code":"CZ","type":"funder","lineage":["https://openalex.org/I202391551"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Martin Dan\u011bk","raw_affiliation_strings":["Czech Academy of Sciences, Praha, Czech Republic","Czech Academy of Sciences, Praha, Czech Republic#TAB#"],"affiliations":[{"raw_affiliation_string":"Czech Academy of Sciences, Praha, Czech Republic","institution_ids":["https://openalex.org/I202391551"]},{"raw_affiliation_string":"Czech Academy of Sciences, Praha, Czech Republic#TAB#","institution_ids":["https://openalex.org/I202391551"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005551281","display_name":"Theodoros Karoubalis","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Theodoros Karoubalis","raw_affiliation_strings":["Atmel Hellas, S.A., Papazachariou, Dimitros, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Atmel Hellas, S.A., Papazachariou, Dimitros, Athens, Greece","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058876274","display_name":"Z. Pohl","orcid":null},"institutions":[{"id":"https://openalex.org/I202391551","display_name":"Czech Academy of Sciences","ror":"https://ror.org/053avzc18","country_code":"CZ","type":"funder","lineage":["https://openalex.org/I202391551"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Zden\u011bk Pohl","raw_affiliation_strings":["Czech Academy of Sciences, Praha, Czech Republic","Czech Academy of Sciences, Praha, Czech Republic#TAB#"],"affiliations":[{"raw_affiliation_string":"Czech Academy of Sciences, Praha, Czech Republic","institution_ids":["https://openalex.org/I202391551"]},{"raw_affiliation_string":"Czech Academy of Sciences, Praha, Czech Republic#TAB#","institution_ids":["https://openalex.org/I202391551"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5005548128"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13562925,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"262","last_page":"262"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.864055871963501},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7984488606452942},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7075306177139282},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6593560576438904},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6151973605155945},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5962752103805542},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.533013641834259},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.4289485514163971},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4116981327533722},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.32487010955810547}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.864055871963501},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7984488606452942},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7075306177139282},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6593560576438904},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6151973605155945},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5962752103805542},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.533013641834259},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.4289485514163971},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4116981327533722},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.32487010955810547},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1046192.1046227","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046227","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"No poverty","id":"https://metadata.un.org/sdg/1","score":0.6499999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540","https://openalex.org/W2204754129","https://openalex.org/W1569711686"],"abstract_inverted_index":{"Although":[0],"runtime":[1],"dynamic":[2],"reconfiguration":[3],"of":[4,12,96],"the":[5,13,24,40,88,97],"FPGA":[6],"devices":[7],"has":[8,17],"been":[9],"an":[10,62],"issue":[11],"last":[14],"decade,":[15],"it":[16],"yet":[18],"to":[19,77],"achieve":[20],"general":[21,51],"recognition":[22],"by":[23],"design":[25,37],"community.":[26],"The":[27,94],"reasons":[28],"for":[29],"this":[30,84],"are":[31,67],"clear;":[32],"there":[33],"exists":[34],"no":[35],"straightforward":[36],"methodology,":[38],"and":[39,42,57,69,91],"partitioning":[41],"CAD":[43],"tool":[44,59,98],"support":[45,83],"is":[46,99],"poor.":[47],"This":[48],"paper":[49],"presents":[50],"concepts":[52],"implemented":[53,79],"in":[54,75],"a":[55,102],"placement":[56],"routing":[58],"that":[60,66,82],"provides":[61],"environment":[63],"where":[64],"designs":[65],"partially":[68],"dynamically":[70],"reconfigurable":[71],"can":[72],"be":[73,78],"processed":[74],"order":[76],"on":[80,101],"FPGAs":[81],"technology,":[85],"such":[86],"as":[87],"Atmel":[89],"AT40K":[90],"AT94K":[92],"series.":[93],"function":[95],"demonstrated":[100],"simple":[103],"real-world":[104],"example.":[105]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
